Numerical simulation study of organic nonvolatile memory with polysilicon floating gate
A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory dev...
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| Published in | Chinese physics B Vol. 25; no. 6; pp. 383 - 389 |
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| Main Author | |
| Format | Journal Article |
| Language | English |
| Published |
IOP Publishing
01.06.2016
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| Subjects | |
| Online Access | Get full text |
| ISSN | 1674-1056 2058-3834 1741-4199 |
| DOI | 10.1088/1674-1056/25/6/067102 |
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| Abstract | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing（P/E） operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application. |
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| AbstractList | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated, in which polysilicon is sandwiched between oxide layers as a floating gate. Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed. The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing (P/E) operations at various P/E voltages are discussed. The simulated results show that present memory exhibits a large memory window of 57.5 V, and a high read current on/off ratio of approximately 10 super(3). Compared with the reported experimental results, these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects, which shows great promise in device designing and practical application. A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated, in which polysilicon is sandwiched between oxide layers as a floating gate. Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed. The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing (P/E) operations at various P/E voltages are discussed. The simulated results show that present memory exhibits a large memory window of 57.5 V, and a high read current on/off ratio of ≈ 103. Compared with the reported experimental results, these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects, which shows great promise in device designing and practical application. A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing（P/E） operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application. |
| Author | 闫兆文 王娇 乔坚栗 谌文杰 杨盼 肖彤 杨建红 |
| AuthorAffiliation | Institute of Microelectronics, Lanzhou University, Lanzhou 730000, China |
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| Cites_doi | 10.1063/1.4817856 10.7567/JJAP.53.06JH02 10.1063/1.1704874 10.1016/j.matlet.2014.03.070 10.1109/LED.2011.2162218 10.1039/c4tc00598h 10.1126/science.1179963 10.1063/1.4860990 10.1002/3527606637 10.1039/C5TC00680E 10.1002/adfm.v23.28 10.1016/j.orgel.2014.07.018 10.1002/adma.201103189 10.1039/c0jm03974h 10.1039/c1jm12113h 10.1063/1.4824817 10.1063/1.1558998 10.1021/acsami.5b01625 10.1109/55.556089 10.1063/1.4776677 10.1088/1468-6996/15/2/024202 10.1063/1.356350 10.1109/TED.2005.859615 10.1002/smll.201501382 10.1063/1.1445286 10.1063/1.3449078 10.1063/1.360940 10.2174/138527212798993031 10.1039/C4FD00095A 10.1016/j.orgel.2011.03.037 10.1016/j.orgel.2015.06.028 10.1039/C4NR03448A 10.1063/1.1661065 10.1088/0022-3727/41/13/135111 10.1016/j.cap.2015.04.039 10.1063/1.3309935 |
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| Copyright | 2016 Chinese Physical Society and IOP Publishing Ltd |
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| Notes | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing（P/E） operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application. organic floating gate memory;polysilicon floating gate;programing and erasing operations;device simulation 11-5639/O4 Zhao-wen Yan,Jiao Wang,Jian-li Qiao,Wen-jie Chen,Pan Yang,Tong Xiao,Jian-hong Yang ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
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| References | 23 24 25 26 27 29 Zhen L (34) 2008; 41 30 10 32 11 Sharifi M J (28) 2011; 02 33 12 13 14 36 15 Wang W (35) 2010; 27 37 16 38 17 39 Cho I (4) 2014; 25 18 19 Wakayama Y (22) 2014; 15 1 2 3 5 6 7 8 9 20 21 Noda K (31) 2014; 53 |
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| Snippet | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is... A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated, in which polysilicon is... |
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| SubjectTerms | Computer simulation Data storage device simulation Electric potential Gates Memory devices organic floating gate memory Oxides polysilicon floating gate programing and erasing operations Simulation Voltage 器件设计 多晶硅 存储器件 接触结构 数值模拟 浮栅 记忆效应 非易失性存储器 |
| Title | Numerical simulation study of organic nonvolatile memory with polysilicon floating gate |
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