Numerical simulation study of organic nonvolatile memory with polysilicon floating gate
A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory dev...
Saved in:
| Published in | Chinese physics B Vol. 25; no. 6; pp. 383 - 389 |
|---|---|
| Main Author | |
| Format | Journal Article |
| Language | English |
| Published |
IOP Publishing
01.06.2016
|
| Subjects | |
| Online Access | Get full text |
| ISSN | 1674-1056 2058-3834 1741-4199 |
| DOI | 10.1088/1674-1056/25/6/067102 |
Cover
| Summary: | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing(P/E) operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application. |
|---|---|
| Bibliography: | A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing(P/E) operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application. organic floating gate memory;polysilicon floating gate;programing and erasing operations;device simulation 11-5639/O4 Zhao-wen Yan,Jiao Wang,Jian-li Qiao,Wen-jie Chen,Pan Yang,Tong Xiao,Jian-hong Yang ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
| ISSN: | 1674-1056 2058-3834 1741-4199 |
| DOI: | 10.1088/1674-1056/25/6/067102 |