Adir, A., Almog, E., Fournier, L., Marcus, E., Rimon, M., Vinov, M., & Ziv, A. (2004). Genesys-Pro: Innovations in test program generation for functional processor verification. IEEE design & test of computers, 21(2), 84-93. https://doi.org/10.1109/MDT.2004.1277900
Chicago Style (17th ed.) CitationAdir, A., E. Almog, L. Fournier, E. Marcus, M. Rimon, M. Vinov, and A. Ziv. "Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification." IEEE Design & Test of Computers 21, no. 2 (2004): 84-93. https://doi.org/10.1109/MDT.2004.1277900.
MLA (9th ed.) CitationAdir, A., et al. "Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification." IEEE Design & Test of Computers, vol. 21, no. 2, 2004, pp. 84-93, https://doi.org/10.1109/MDT.2004.1277900.