eXtended Torus routing algorithm for networks-on-chip: a routing algorithm for dynamically reconfigurable networks-on-chip - Beldachi, Arash Farhadi; Hollis, Simon; Nunez-Yanez, Jose L (Chronic diseases and translational medicine, 2014)
Keywords: Algorithms; application behaviour; Applied sciences; Circuit properties; Communication; Design; Design. Technologies. Operation analysis. Testing; Digital circuits; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Error correction & detection; Exact sciences and technology; eXtended Torus routing algorithm for networks‐on‐chip; Field programmable gate arrays; FPGA; Hierarchies; inner‐torus building blocks; Integrated circuits; mesh generation; mesh topology; network‐on‐chip; nonregular global topologies; Performance evaluation; resource availability; Routers; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; topology; XTRANC algorithm; network-on-chip; eXtended Torus routing algorithm for networks-on-chip; application behaviour; inner-torus building blocks; XTRANC algorithm; field programmable gate arrays; nonregular global topologies; FPGA; topology; mesh generation; resource availability; mesh topology; Performance evaluation; Interconnection network; Dynamic characteristic; Meshed network; Network architecture; Field programmable gate array; System on a chip; Algorithm; Centralized control; Deadlock; Integrated circuit; Reconfigurable architectures; Speech processing; Execution time