Jaras, I., & Orchard, M. (2018). Performance assessment of sequential Bayesian processors based on probably approximately correct computation and information theory. Electronics letters, 54(6), 357-359. https://doi.org/10.1049/el.2017.4159
Chicago Style (17th ed.) CitationJaras, I., and M.E Orchard. "Performance Assessment of Sequential Bayesian Processors Based on Probably Approximately Correct Computation and Information Theory." Electronics Letters 54, no. 6 (2018): 357-359. https://doi.org/10.1049/el.2017.4159.
MLA (9th ed.) CitationJaras, I., and M.E Orchard. "Performance Assessment of Sequential Bayesian Processors Based on Probably Approximately Correct Computation and Information Theory." Electronics Letters, vol. 54, no. 6, 2018, pp. 357-359, https://doi.org/10.1049/el.2017.4159.