Timing-Skew Calibration Techniques in Time-Interleaved ADCs
Time-interleaved (TI) analog-to-digital converters (ADCs) are a widely used architecture in high-speed ADCs. With the growing demand for higher sampling rates, time interleaving plays an increasingly important role. However, imperfections introduced by time interleaving, particularly timing skew, si...
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          | Published in | IEEE open journal of solid-state circuits Vol. 5; pp. 1 - 10 | 
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| Main Authors | , , , , | 
| Format | Journal Article | 
| Language | English | 
| Published | 
            IEEE
    
        2025
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| Subjects | |
| Online Access | Get full text | 
| ISSN | 2644-1349 2644-1349  | 
| DOI | 10.1109/OJSSCS.2024.3519486 | 
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| Summary: | Time-interleaved (TI) analog-to-digital converters (ADCs) are a widely used architecture in high-speed ADCs. With the growing demand for higher sampling rates, time interleaving plays an increasingly important role. However, imperfections introduced by time interleaving, particularly timing skew, significantly limit the ADC performance. This article presents a comprehensive review of timing skew and its calibration techniques in TI ADCs. It covers the fundamentals of time interleaving, the principle of timing skew, and general considerations of timing-skew calibration. Moreover, it categorizes existing calibration techniques into three types: 1) autocorrelation-based; 2) reference-channel-based; and 3) reference-signal-based, and provides detailed analyses. | 
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| ISSN: | 2644-1349 2644-1349  | 
| DOI: | 10.1109/OJSSCS.2024.3519486 |