OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs

• Published in: IEEE MICRO Vol. 40; no. 4; pp. 41 - 48
• Main Authors: Tang, Xifan, Giacomin, Edouard, Chauviere, Baudouin, Alacchi, Aurelien, Gaillardon, Pierre-Emmanuel
• Format: Journal Article
• Language: English
• Published: Los Alamitos IEEE 01.07.2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithms; Circuits; Computer architecture; Computer networks; Customization; Data processing; Distributed processing; Fabrics; Field programmable gate arrays; Generators; Hardware design languages; Layouts; Microprocessors; Open source software; Prototyping; Specification and description languages
• ISSN: 0272-1732; 1937-4143; 1937-4143
• DOI: 10.1109/MM.2020.2995854

Demanded by ever-evolving data processing algorithms, field-programmable gate arrays (FPGAs) have become essential components of modern computing systems, thanks to their reconfigurable and distributed computing capabilities. However, FPGAs are among the very few integrated chips that still require long development cycles and high human efforts, even for industrial vendors. In this article, we introduce OpenFPGA, an open-source framework that can automate and significantly accelerate the development cycle of customizable FPGA architectures. OpenFPGA allows users to customize their FPGA architectures down to circuit-level details using a high-level architecture description language and autogenerate associated Verilog netlists which can be used in a backend flow to generate production-ready layouts. A generic Verilog-to-Bitstream generator is also provided, allowing end-users to implement practical applications on any FPGAs that OpenFPGA can support. Using OpenFPGA, we demonstrate less than 24-h layout generation of two FPGA fabrics, which are based on a Stratix-like architecture built with a commercial 12-nm standard cell library and 40-nm custom cells, respectively.