FPGA-Based Experimental Investigation of a Quasi-Centralized Model Predictive Control for Back-to-Back Converters

• Published in: IEEE transactions on power electronics Vol. 31; no. 1; pp. 662 - 674
• Main Authors: Zhenbin Zhang, Fengxiang Wang, Tongjing Sun, Rodriguez, Jose, Kennel, Ralph
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Back-to-Back Converter; Controllers; Converters; Cost function; DC-link Control; Electric currents; Electric potential; Electric power; Electrical equipment; Equations; Field programmable gate arrays; FPGA; Mathematical model; Mathematical models; PI-DMPC; Predictive control; QC-DMPC; Robustness; Vectors; Voltage; Voltage control; quasi-centralized direct model predictive control (QC-DMPC); dc-link control; field programmable gate array (FPGA); Back-to-back converter; proportional-integration (PI) dc-link controller-based DMPC (PI-DMPC)
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2015.2397695

Voltage source back-to-back power converters are widely used in grid-tied applications. This paper presents a quasi-centralized direct model predictive control (QC-DMPC) scheme for back-to-back converter control without a dc-link outer-loop controller. Furthermore, the QC-DMPC is experimentally compared with a conventional proportional-integration (PI) dc-link controller-based DMPC (PI-DMPC) scheme. For the QC-DMPC scheme, the dc-link voltage is directly controlled by a grid-side predictive controller using a dynamic reference generation concept and load-side power estimation. For the PI-DMPC scheme, the dc-link voltage is controlled by an external PI controller. Both schemes are implemented on a field programmable gate array (FPGA)-based platform. Effectiveness of the proposed QC-DMPC is verified by both simulation and experimental data. Moreover, FPGA implementation issues (resource usage and timing information), dc-link control performance, and robustness to parameter variation of the two DMPC schemes are compared in detail. The results emphasize that the QC-DMPC may outperform the PI-DMPC scheme in normal operation but with a slightly higher usage of FPGA resources. However, PI-DMPC scheme is more robust when parameter variations are considered.