Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults

Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and system-on-chip designs. At the same time, transistor reliability is becoming a major concern due to the continuous scaling of silicon. As the...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on computers Vol. 65; no. 7; pp. 2241 - 2256
Main Authors Parikh, Ritesh, Bertacco, Valeria
Format Journal Article
LanguageEnglish
Published New York IEEE 01.07.2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Online AccessGet full text
ISSN0018-9340
1557-9956
DOI10.1109/TC.2015.2479586

Cover

Abstract Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and system-on-chip designs. At the same time, transistor reliability is becoming a major concern due to the continuous scaling of silicon. As the sole medium of on-chip communication, it is critical for a NoC to be able to tolerate many permanent transistor failures. In this paper, we propose uDIREC, a unified framework for permanent fault diagnosis and subsequent reconfiguration in NoCs, which provides graceful performance degradation with an increasing number of faults. Upon in-field transistor failures, uDIREC leverages a fine-resolution diagnosis mechanism to disable faulty components very sparingly. At its core, uDIREC employs MOUNT, a novel routing algorithm to find reliable and deadlock-free routes that utilize all the still-functional links in the NoC. We implement uDIREC's reconfiguration as a truly-distributed hardware solution, still keeping the area overhead at a minimum. We also propose a software-implemented reconfiguration that provides greater integration with our software-based diagnosis scheme, at the cost of distributed nature of implementation. Regardless of the adopted implementation scheme, uDIREC places no restriction on topology, router architecture and number and location of faults. Experimental results show that uDIREC, implemented in a 64-node NoC, drops 3<inline-formula> <tex-math notation="LaTeX">\times</tex-math> <inline-graphic xlink:type="simple" xlink:href="parikh-ieq1-2479586.gif"/> </inline-formula> fewer nodes and provides greater than 25 percent throughput improvement (beyond 15 faults) when compared to other state-of-the-art fault-tolerance solutions. uDIREC's improvement over prior-art grows further with more faults, making it a effective NoC reliability solution for a wide range of fault rates.
AbstractList Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and system-on-chip designs. At the same time, transistor reliability is becoming a major concern due to the continuous scaling of silicon. As the sole medium of on-chip communication, it is critical for a NoC to be able to tolerate many permanent transistor failures. In this paper, we propose uDIREC, a unified framework for permanent fault diagnosis and subsequent reconfiguration in NoCs, which provides graceful performance degradation with an increasing number of faults. Upon in-field transistor failures, uDIREC leverages a fine-resolution diagnosis mechanism to disable faulty components very sparingly. At its core, uDIREC employs MOUNT, a novel routing algorithm to find reliable and deadlock-free routes that utilize all the still-functional links in the NoC. We implement uDIREC's reconfiguration as a truly-distributed hardware solution, still keeping the area overhead at a minimum. We also propose a software-implemented reconfiguration that provides greater integration with our software-based diagnosis scheme, at the cost of distributed nature of implementation. Regardless of the adopted implementation scheme, uDIREC places no restriction on topology, router architecture and number and location of faults. Experimental results show that uDIREC, implemented in a 64-node NoC, drops 3 $\times$ [formula graphic omitted, see PDF] fewer nodes and provides greater than 25 percent throughput improvement (beyond 15 faults) when compared to other state-of-the-art fault-tolerance solutions. uDIREC's improvement over prior-art grows further with more faults, making it a effective NoC reliability solution for a wide range of fault rates.
Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and system-on-chip designs. At the same time, transistor reliability is becoming a major concern due to the continuous scaling of silicon. As the sole medium of on-chip communication, it is critical for a NoC to be able to tolerate many permanent transistor failures. In this paper, we propose uDIREC, a unified framework for permanent fault diagnosis and subsequent reconfiguration in NoCs, which provides graceful performance degradation with an increasing number of faults. Upon in-field transistor failures, uDIREC leverages a fine-resolution diagnosis mechanism to disable faulty components very sparingly. At its core, uDIREC employs MOUNT, a novel routing algorithm to find reliable and deadlock-free routes that utilize all the still-functional links in the NoC. We implement uDIREC's reconfiguration as a truly-distributed hardware solution, still keeping the area overhead at a minimum. We also propose a software-implemented reconfiguration that provides greater integration with our software-based diagnosis scheme, at the cost of distributed nature of implementation. Regardless of the adopted implementation scheme, uDIREC places no restriction on topology, router architecture and number and location of faults. Experimental results show that uDIREC, implemented in a 64-node NoC, drops 3<inline-formula> <tex-math notation="LaTeX">\times</tex-math> <inline-graphic xlink:type="simple" xlink:href="parikh-ieq1-2479586.gif"/> </inline-formula> fewer nodes and provides greater than 25 percent throughput improvement (beyond 15 faults) when compared to other state-of-the-art fault-tolerance solutions. uDIREC's improvement over prior-art grows further with more faults, making it a effective NoC reliability solution for a wide range of fault rates.
Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and system-on-chip designs. At the same time, transistor reliability is becoming a major concern due to the continuous scaling of silicon. As the sole medium of on-chip communication, it is critical for a NoC to be able to tolerate many permanent transistor failures. In this paper, we propose uDIREC, a unified framework for permanent fault diagnosis and subsequent reconfiguration in NoCs, which provides graceful performance degradation with an increasing number of faults. Upon in-field transistor failures, uDIREC leverages a fine-resolution diagnosis mechanism to disable faulty components very sparingly. At its core, uDIREC employs MOUNT, a novel routing algorithm to find reliable and deadlock-free routes that utilize all the still-functional links in the NoC. We implement uDIREC's reconfiguration as a truly-distributed hardware solution, still keeping the area overhead at a minimum. We also propose a software-implemented reconfiguration that provides greater integration with our software-based diagnosis scheme, at the cost of distributed nature of implementation. Regardless of the adopted implementation scheme, uDIREC places no restriction on topology, router architecture and number and location of faults. Experimental results show that uDIREC, implemented in a 64-node NoC, drops 3[Formula Omitted] fewer nodes and provides greater than 25 percent throughput improvement (beyond 15 faults) when compared to other state-of-the-art fault-tolerance solutions. uDIREC's improvement over prior-art grows further with more faults, making it a effective NoC reliability solution for a wide range of fault rates.
Author Parikh, Ritesh
Bertacco, Valeria
Author_xml – sequence: 1
  givenname: Ritesh
  surname: Parikh
  fullname: Parikh, Ritesh
  email: ritesh.parikh@intel.com
  organization: Intel Corporation, Santa Clara, CA
– sequence: 2
  givenname: Valeria
  surname: Bertacco
  fullname: Bertacco, Valeria
  email: valeria@umich.edu
  organization: Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI
BookMark eNp9kD1PxDAMhiMEEsfHzMBSiYWlh50mTTOiwgESAoSOOQrBRUG9BJJ24N_T4xADA5OX57VfP3tsO8RAjB0hzBFBny3bOQeUcy6Ulk29xWYopSq1lvU2mwFgU-pKwC7by_kNAGoOesZuHinHMTkq2hiy83HMxYW3ryFmnwsbXopHcjF0_nVMdvAxFF1MxV1siwdKKxsoDMXCjv2QD9hOZ_tMhz9znz0tLpftdXl7f3XTnt-WruJ8KK2qOqorB8q6DlFx8aI71UHjZO0kB-DohH1WxFE3ytXOWouNEuQEVki62menm73vKX6MlAez8tlR309lpvYGGy6FlkrICT35g75Nv4apncFJkq7WJyZKbiiXYs6JOuP88P3rkKzvDYJZCzbL1qwFmx_BU-7sT-49-ZVNn_8kjjcJT0S_tOIKQUD1BbQuhmk
CODEN ITCOB4
CitedBy_id crossref_primary_10_1007_s11227_021_03791_8
crossref_primary_10_1145_3243214
crossref_primary_10_1016_j_micpro_2023_104910
crossref_primary_10_1007_s11227_019_02915_5
crossref_primary_10_1016_j_memori_2023_100059
crossref_primary_10_1016_j_vlsi_2020_01_005
crossref_primary_10_1080_0952813X_2019_1597174
Cites_doi 10.1109/TC.2004.1268400
10.1109/MICRO.2008.4771786
10.1109/PACT.2011.61
10.1109/IPDPS.2006.1639341
10.1145/1454115.1454128
10.1109/NOCS.2007.39
10.1109/ISSCC.2010.5434077
10.1145/1028176.1006718
10.1145/2155620.2155627
10.1109/ETS.2007.41
10.1109/DATE.2009.5090667
10.1109/TPDS.1996.4772741
10.1109/MICRO.2012.15
10.1109/TPDS.2004.28
10.1109/L-CA.2004.1
10.1145/1105734.1105747
10.1109/MM.2005.110
10.1109/TCAD.2010.2041851
10.1109/ISPASS.2013.6557149
10.1109/NOCS.2008.4492721
10.1109/TPDS.2003.1225057
10.1109/HPCA.2006.1598108
10.1145/2024724.2024928
10.1109/TC.2008.31
10.1145/1966445.1966477
10.1109/DATE.2011.5763303
10.1109/TCAD.2011.2181509
10.1007/s00607-013-0362-9
10.1109/12.589238
10.1109/ISVLSI.2004.1339507
10.1109/MM.2007.4378780
10.1145/2366231.2337199
10.1109/MDT.2005.104
10.1145/1629911.1630119
10.1109/DFT.2009.41
10.1109/TC.2008.62
10.1109/JSSC.2007.910957
10.1109/VTS.2012.6231078
10.1145/2155620.2155668
10.1145/1391469.1391584
10.1109/ISCA.2002.1003567
10.1109/DATE.2002.998256
10.1109/49.105178
10.1109/DATE.2009.5090700
10.1109/12.506423
10.1007/3-540-39999-2_23
10.1145/2540708.2540722
10.1109/NOCS.2009.5071441
10.1109/TEST.2011.6139156
10.1109/12.780873
10.1109/71.877831
10.1145/1150019.1136487
10.1109/TC.1987.1676939
ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016
DBID 97E
RIA
RIE
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
F28
FR3
DOI 10.1109/TC.2015.2479586
DatabaseName IEEE All-Society Periodicals Package (ASPP) 2005–Present
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library
CrossRef
Computer and Information Systems Abstracts
Electronics & Communications Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
ANTE: Abstracts in New Technology & Engineering
Engineering Research Database
DatabaseTitle CrossRef
Technology Research Database
Computer and Information Systems Abstracts – Academic
Electronics & Communications Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts Professional
Engineering Research Database
ANTE: Abstracts in New Technology & Engineering
DatabaseTitleList Technology Research Database

Technology Research Database
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
Computer Science
EISSN 1557-9956
EndPage 2256
ExternalDocumentID 4086964161
10_1109_TC_2015_2479586
7271040
Genre orig-research
GrantInformation_xml – fundername: MARCO
  funderid: 10.13039/100007245
– fundername: DARPA
  funderid: 10.13039/100000185
– fundername: STARnet
GroupedDBID --Z
-DZ
-~X
.DC
0R~
29I
4.4
5GY
6IK
85S
97E
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABQJQ
ABVLG
ACGFO
ACIWK
ACNCT
AENEX
AETEA
AGQYO
AGSQL
AHBIQ
AKQYR
ALMA_UNASSIGNED_HOLDINGS
ASUFR
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CS3
DU5
EBS
EJD
HZ~
IEDLZ
IFIPE
IPLJI
JAVBF
LAI
M43
MS~
O9-
OCL
P2P
PQQKQ
RIA
RIE
RNS
RXW
TAE
TN5
TWZ
UHB
UPT
XZL
YZZ
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
F28
FR3
ID FETCH-LOGICAL-c322t-a73fe63c07acf11724d9f7f08c56c520021c4ab7e21987c6caaa1874ec4131e93
IEDL.DBID RIE
ISSN 0018-9340
IngestDate Sun Sep 28 10:11:38 EDT 2025
Mon Jun 30 04:12:58 EDT 2025
Wed Oct 01 00:45:14 EDT 2025
Thu Apr 24 22:52:00 EDT 2025
Wed Aug 27 02:49:02 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 7
Keywords diagnosis
permanent faults
reconfiguration
NoC
reliability
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c322t-a73fe63c07acf11724d9f7f08c56c520021c4ab7e21987c6caaa1874ec4131e93
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
content type line 23
PQID 1795931987
PQPubID 85452
PageCount 16
ParticipantIDs crossref_primary_10_1109_TC_2015_2479586
proquest_miscellaneous_1825495745
proquest_journals_1795931987
ieee_primary_7271040
crossref_citationtrail_10_1109_TC_2015_2479586
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2016-July-1
2016-7-1
20160701
PublicationDateYYYYMMDD 2016-07-01
PublicationDate_xml – month: 07
  year: 2016
  text: 2016-July-1
  day: 01
PublicationDecade 2010
PublicationPlace New York
PublicationPlace_xml – name: New York
PublicationTitle IEEE transactions on computers
PublicationTitleAbbrev TC
PublicationYear 2016
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
References ref13
ref56
ref12
ref15
ref58
ref14
ref53
ref52
ref55
ref11
ref54
ref10
ref17
ref19
ref18
ref51
ref50
ref46
ref45
ref48
ref47
ref42
ref41
ref44
parikh (ref43) 2011
ref49
glass (ref33) 1996; 7
ref8
ref7
ref9
ref4
ref3
ref6
ref5
ref35
ref34
ref37
ref36
ref31
(ref32) 0; 2007
ref30
park (ref16) 0
ref1
ref39
ref38
ref24
ref23
ref26
ref25
ref20
ref22
ref21
ref28
ref27
ref29
sancho (ref40) 0
glass (ref57) 0
adve (ref2) 0
References_xml – ident: ref29
  doi: 10.1109/TC.2004.1268400
– ident: ref5
  doi: 10.1109/MICRO.2008.4771786
– ident: ref7
  doi: 10.1109/PACT.2011.61
– ident: ref39
  doi: 10.1109/IPDPS.2006.1639341
– ident: ref53
  doi: 10.1145/1454115.1454128
– ident: ref37
  doi: 10.1109/NOCS.2007.39
– ident: ref55
  doi: 10.1109/ISSCC.2010.5434077
– ident: ref8
  doi: 10.1145/1028176.1006718
– ident: ref49
  doi: 10.1145/2155620.2155627
– ident: ref20
  doi: 10.1109/ETS.2007.41
– ident: ref25
  doi: 10.1109/DATE.2009.5090667
– volume: 7
  start-page: 620
  year: 1996
  ident: ref33
  article-title: Fault-tolerant wormhole routing in meshes without virtual channels
  publication-title: IEEE Trans Parallel Distrib Syst
  doi: 10.1109/TPDS.1996.4772741
– ident: ref42
  doi: 10.1109/MICRO.2012.15
– ident: ref51
  doi: 10.1109/TPDS.2004.28
– start-page: 278
  year: 0
  ident: ref57
  article-title: The turn model for adaptive routing
  publication-title: Proc of the 19th Annual Intl Symp on Comp Arch
– ident: ref27
  doi: 10.1109/L-CA.2004.1
– ident: ref54
  doi: 10.1145/1105734.1105747
– ident: ref3
  doi: 10.1109/MM.2005.110
– ident: ref26
  doi: 10.1109/TCAD.2010.2041851
– ident: ref52
  doi: 10.1109/ISPASS.2013.6557149
– ident: ref11
  doi: 10.1109/NOCS.2008.4492721
– start-page: 93
  year: 0
  ident: ref16
  article-title: Exploring fault-tolerant network-on-chip architectures
  publication-title: Proc Int Conf Dependable Syst Netw
– ident: ref46
  doi: 10.1109/TPDS.2003.1225057
– ident: ref9
  doi: 10.1109/HPCA.2006.1598108
– ident: ref48
  doi: 10.1145/2024724.2024928
– ident: ref45
  doi: 10.1109/TC.2008.31
– volume: 2007
  year: 0
  ident: ref32
– ident: ref1
  doi: 10.1145/1966445.1966477
– ident: ref12
  doi: 10.1109/DATE.2011.5763303
– ident: ref41
  doi: 10.1109/TCAD.2011.2181509
– ident: ref30
  doi: 10.1007/s00607-013-0362-9
– ident: ref34
  doi: 10.1109/12.589238
– ident: ref31
  doi: 10.1109/ISVLSI.2004.1339507
– ident: ref13
  doi: 10.1109/MM.2007.4378780
– ident: ref4
  doi: 10.1145/2366231.2337199
– ident: ref17
  doi: 10.1109/MDT.2005.104
– ident: ref6
  doi: 10.1145/1629911.1630119
– ident: ref35
  doi: 10.1109/DFT.2009.41
– ident: ref21
  doi: 10.1109/TC.2008.62
– ident: ref14
  doi: 10.1109/JSSC.2007.910957
– year: 2011
  ident: ref43
  article-title: Comprehensive online defect diagnosis in on-chip networks
  publication-title: Workshop Resilient Archit
– ident: ref19
  doi: 10.1109/VTS.2012.6231078
– ident: ref50
  doi: 10.1145/2155620.2155668
– ident: ref36
  doi: 10.1145/1391469.1391584
– ident: ref47
  doi: 10.1109/ISCA.2002.1003567
– ident: ref18
  doi: 10.1109/DATE.2002.998256
– start-page: 177
  year: 0
  ident: ref2
  article-title: The impact of technology scaling on lifetime reliability
  publication-title: Proc Int Conf Dependable Syst Netw
– ident: ref38
  doi: 10.1109/49.105178
– ident: ref56
  doi: 10.1109/DATE.2009.5090700
– ident: ref28
  doi: 10.1109/12.506423
– start-page: 260
  year: 0
  ident: ref40
  article-title: A flexible routing scheme for networks of workstations
  publication-title: Proc of the Int Symp on High-Performance Computing
  doi: 10.1007/3-540-39999-2_23
– ident: ref15
  doi: 10.1145/2540708.2540722
– ident: ref22
  doi: 10.1109/NOCS.2009.5071441
– ident: ref23
  doi: 10.1109/TEST.2011.6139156
– ident: ref24
  doi: 10.1109/12.780873
– ident: ref44
  doi: 10.1109/71.877831
– ident: ref10
  doi: 10.1145/1150019.1136487
– ident: ref58
  doi: 10.1109/TC.1987.1676939
SSID ssj0006209
Score 2.2007675
Snippet Networks-on-chip (NoCs) have been increasingly adopted in recent years due to the extensive integration of many components in modern multicore processors and...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 2241
SubjectTerms Algorithm design and analysis
Diagnosis
Failure
Fault diagnosis
Faults
Mathematical models
NoC
permanent faults
Ports (Computers)
Reconfiguration
Reliability
Routing
Semiconductor devices
Software
System recovery
System-on-chip
Transistors
Title Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults
URI https://ieeexplore.ieee.org/document/7271040
https://www.proquest.com/docview/1795931987
https://www.proquest.com/docview/1825495745
Volume 65
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVIEE
  databaseName: IEEE Electronic Library (IEL)
  customDbUrl:
  eissn: 1557-9956
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0006209
  issn: 0018-9340
  databaseCode: RIE
  dateStart: 19680101
  isFulltext: true
  titleUrlDefault: https://ieeexplore.ieee.org/
  providerName: IEEE
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LT-QwDLZYTnBY3trhpSBx4EBLS5pkekQDI0ACcRgkblXqpgiBOqud9sKvx04fQrAr7a1S0za14_iRzzbAsYyVRdSMVFNRQPZtEViDeaC42Dep9DL3ibR39_r6Mbl9Uk9LcDrkwjjnPPjMhXzpz_KLOTYcKjsjXUveAznoP8xYt7law66rezhHTAIsk6gr4xNH6dlswhAuFZ4nJlWcNP1JA_mWKt_2Ya9cpmtw10-rxZS8hk2dh_j-pWLj_857HX52Vqa4aJfFBiy5ahPW-g4OohPoTVj9VI5wC276WL7gNp7I6Fhx2ULxXhbCVoVgZ7UqX56bdt0IsnjF_XwiHnh_r2gSYmqbt3qxDY_Tq9nkOuhaLQRIEl0Tf2TptMTIWCxjMmqSIi1NGY1RaVQeyIGJzY075yAFarTWcjc_h6QEY5fKHViu5pX7BQK1K2RSyHFpZOJUTh4wuZy5LbmmuUnHIwh78mfY1SHndhhvmfdHojSbTTLmV9bxawQnwwO_2xIc_x66xdQfhnWEH8F-z9-sE9FFFnOXdcm_M4Kj4TYJF5-YEMmIxlns_WdlErX79zfvwQp9X7f43X1Yrv807oCslDo_9MvzA2LC4es
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3dT9wwDLcQPGx7gAGbdnyMTOJhD2tpSdJeH9Ftp2PjTjwcEm9R6qYTGupNXPvCX4-dfgiNTdpbpSaVa8exnfxsA5zKWFvEhJFqOgrIvy0Cm2IeaC72TSa9zH0i7XyRzG7U91t9uwFfhlwY55wHn7mQH_1dfrHCho_KzsjWUvRAAfqWVkrpNltr2HeTHtARkwpLFXWFfOIoO1tOGMSlw3OVZprTpp_ZIN9U5cVO7M3LdAfmPWEtquRX2NR5iI9_1Gz8X8rfwnbnZ4qLdmHswoar9mCn7-EgOpXegzfPChLuw2V_mi-4kScyPlZ8bcF4d2thq0JwuFqVdz-bduUI8nnFYjUR17zDV0SEmNrmvl6_g5vpt-VkFnTNFgIkna5JQrJ0icQotVjG5NaoIivTMhqjTlB7KAcqm6funI8pMEFrLffzc0hmMHaZfA-b1apyH0Bg4gqpCjkuU6mczikGpqAztyVXNU-z8QjCnv0Gu0rk3BDj3viIJMrMcmJYXqaT1wg-DxN-t0U4_j10n7k_DOsYP4KjXr6mU9K1ibnPuuTfGcGn4TWpF9-ZEMuIxyb2EbROlT74-5dP4NVsOb8yV5eLH4fwmmhJWjTvEWzWD407Jp-lzj_6pfoEXkzlOA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Resource+Conscious+Diagnosis+and+Reconfiguration+for+NoC+Permanent+Faults&rft.jtitle=IEEE+transactions+on+computers&rft.au=Parikh%2C+Ritesh&rft.au=Bertacco%2C+Valeria&rft.date=2016-07-01&rft.issn=0018-9340&rft.volume=65&rft.issue=7&rft.spage=2241&rft.epage=2256&rft_id=info:doi/10.1109%2FTC.2015.2479586&rft.externalDBID=NO_FULL_TEXT
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0018-9340&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0018-9340&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0018-9340&client=summon