High performance rotation architectures based on the radix-4 CORDIC algorithm

• Published in: IEEE transactions on computers Vol. 46; no. 8; pp. 855 - 870
• Main Authors: Antelo, E., Villalba, J., Bruguera, J.D., Zapata, E.L.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.08.1997; Institute of Electrical and Electronics Engineers
• Subjects: Algebra; Algorithmics. Computability. Computer arithmetics; Applied sciences; Computer architecture; Computer science; control theory; systems; Delay; Digital arithmetic; Exact sciences and technology; Hardware; Image processing; Iterative algorithms; Theoretical computing; Vectors; Very large scale integration; Digital arithmetic; Pipeline processor; Computer arithmetic; VLSI circuits
• ISSN: 0018-9340
• DOI: 10.1109/12.609275

Traditionally, CORDIC algorithms have employed radix-2 in the first n/2 microrotations (n is the precision in bits) in order to preserve a constant scale factor. The authors present a full radix-4 CORDIC algorithm in rotation mode and circular coordinates and its corresponding selection function, and propose an efficient technique for the compensation of the nonconstant scale factor. Three radix-4 CORDIC architectures are implemented: 1) a word serial architecture based on the zero skipping technique, 2) a pipelined architecture, and 3) an application specific architecture (the angles are known beforehand). The first two are general purpose implementations where redundant (carry-save) or nonredundant arithmetic can be used, whereas the last one is a simplification of the first two. The proposed architectures present a good trade-off between latency and hardware complexity when compared with existing CORDIC architectures.