An FPGA-based automated approach for identification and setting of the single electron response threshold voltage in portable TDCR systems

• Published in: Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment Vol. 1048; p. 167925
• Main Authors: Sharma, M.K., Agarwal, Shivam, Kulkarni, M.S., Kulkarni, D.B.
• Format: Journal Article
• Language: English
• Published: Elsevier B.V 01.03.2023
• Subjects: Automated SER threshold voltage identification; Digital to Analog Converter (DAC); Embedded programming; Field Programmable Gate Array (FPGA) based hardware implementation; Portable Triple to Double Coincidence Ratio (TDCR); Embedded programming; Digital to Analog Converter (DAC); Field Programmable Gate Array (FPGA) based hardware implementation; Portable Triple to Double Coincidence Ratio (TDCR); Automated SER threshold voltage identification
• ISSN: 0168-9002; 1872-9576
• DOI: 10.1016/j.nima.2022.167925

The threshold voltage setting of the pulse counting discriminator corresponding to each of the three photomultiplier tubes (PMTs) is crucial in a Triple to Double Coincidence Ratio (TDCR) system for accurate measurement of the activity of a radionuclide. The discriminator threshold voltage of each PMT signal processing channel is required to be set before the single electron response peak and after the thermal noise to allow the detection of a single photoelectron from the photocathode of the PMT. The portable TDCR systems, when subject to different field environments for accurate in-situ activity measurements, may need the re-setting of the discriminator threshold of the PMT channels. However, such miniaturized systems have minimal access to the circuit components for the sake of compactness. Therefore, an automatic solution to obviate the need for access to the circuit components (test connectors/test points) and the measuring instruments in the field is preferred. A Field Programmable Gate Array (FPGA) based automated methodology for identifying and digitally controlling the discriminator threshold voltage in standalone, portable TDCR systems is discussed. •An automated FPGA based methodology for identification and setting of SER threshold voltages in the TDCR system.•An indigenous hardware design and implementation with software control.•The methodology obviates the need to tune the HV of an individual PMT or preamplifier gain.•Simplified fabrication and maintenance of the portable TDCR systems.