APA (7th ed.) Citation

Yamaoka, M., Yoshimura, C., Hayashi, M., Okuyama, T., Aoki, H., & Mizuno, H. (2016). A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing. IEEE journal of solid-state circuits, 51(1), 303-309. https://doi.org/10.1109/JSSC.2015.2498601

Chicago Style (17th ed.) Citation

Yamaoka, Masanao, Chihiro Yoshimura, Masato Hayashi, Takuya Okuyama, Hidetaka Aoki, and Hiroyuki Mizuno. "A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing." IEEE Journal of Solid-state Circuits 51, no. 1 (2016): 303-309. https://doi.org/10.1109/JSSC.2015.2498601.

MLA (9th ed.) Citation

Yamaoka, Masanao, et al. "A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing." IEEE Journal of Solid-state Circuits, vol. 51, no. 1, 2016, pp. 303-309, https://doi.org/10.1109/JSSC.2015.2498601.