FPGA implementation of an improved envelope detection approach for bearing fault diagnosis

This study presents an enhanced envelope detection technique implemented on a field-programmable gate array (FPGA) to diagnose bearing faults in rotating machinery. Bearing faults frequently result in machinery breakdowns, incurring substantial downtime and maintenance expenses. In our approach, we...

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Bibliographic Details
Published inJournal of engineering and applied science (Online) Vol. 71; no. 1; pp. 3 - 19
Main Authors Rebiai, Mohamed, Bengharbia, Billel, Maazouz, Mohamed, Toumi, Yassine
Format Journal Article
LanguageEnglish
Published Berlin/Heidelberg Springer Berlin Heidelberg 01.12.2024
Springer Nature B.V
SpringerOpen
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ISSN1110-1903
2536-9512
2536-9512
DOI10.1186/s44147-023-00343-0

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Summary:This study presents an enhanced envelope detection technique implemented on a field-programmable gate array (FPGA) to diagnose bearing faults in rotating machinery. Bearing faults frequently result in machinery breakdowns, incurring substantial downtime and maintenance expenses. In our approach, we employ the Teager energy operator (TEO) to extract the vibration signal envelope. Subsequently, we subject the envelope signal to the fast Fourier transform (FFT) to generate the envelope spectrum of the vibration signal. Finally, we further refine the envelope spectrum using TEO for a second time, resulting in a pronounced fault peak that facilitates early fault detection. We evaluate the effectiveness and performance of the proposed method using two distinct types of bearing vibration signals, one being simulated and the other measured. Our findings reveal that the suggested approach outperforms traditional envelope detection methods, leading to a substantially enhanced fault diagnosis capability. For instance, when we assess the characteristic frequency ratio (FCFR) for faults in the inner and outer rings of the bearing using the proposed method, we observe that the FCFR values are significantly elevated, ranging from 160 to 330% higher compared to the analysis performed by the TEO and HT methods. Consequently, this indicates that the proposed approach has the ability to detect faults at an earlier stage than other methods. Furthermore, the FPGA-based implementation makes it suitable for critical industrial applications where rapid fault detection is essential to prevent catastrophic failures.
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ISSN:1110-1903
2536-9512
2536-9512
DOI:10.1186/s44147-023-00343-0