Determination of the Bit Error Rate Due to Thermal Noise Using JoSIM Superconducting Circuit Simulator and the Monte Carlo Method
Thermal noise requires careful consideration during the design process of RSFQ circuits since it reduces circuit operating margins and can cause switching errors. Bit error rate (BER) provides a useful means of analysing the effect of this noise on a circuit. With tools developed under the IARPA Sup...
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| Published in | IEEE transactions on applied superconductivity Vol. 33; no. 5; pp. 1 - 5 |
|---|---|
| Main Authors | , , |
| Format | Journal Article |
| Language | English |
| Published |
New York
IEEE
01.08.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
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| Online Access | Get full text |
| ISSN | 1051-8223 1558-2515 |
| DOI | 10.1109/TASC.2023.3251940 |
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| Abstract | Thermal noise requires careful consideration during the design process of RSFQ circuits since it reduces circuit operating margins and can cause switching errors. Bit error rate (BER) provides a useful means of analysing the effect of this noise on a circuit. With tools developed under the IARPA SuperTools project, we present an implementation of the Monte-Carlo technique for determining BER via simulation. The Monte-Carlo method has been considered previously but not widely implemented due to slow simulation times preventing the determination of small BER values. We use JoSIM - an efficient simulator with SPICE syntax that allows for the simulation of superconducting components and noise sources with improved speed over older superconductor simulators. This speed improvement makes the Monte-Carlo method viable. The simulated BER is plotted against bias current with values in the low-BER region interpolated from the simulated values using MATLAB. We show how the results need to be used as a further qualifier of circuit performance for the characterization of a logic cell library. |
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| AbstractList | Thermal noise requires careful consideration during the design process of RSFQ circuits since it reduces circuit operating margins and can cause switching errors. Bit error rate (BER) provides a useful means of analysing the effect of this noise on a circuit. With tools developed under the IARPA SuperTools project, we present an implementation of the Monte-Carlo technique for determining BER via simulation. The Monte-Carlo method has been considered previously but not widely implemented due to slow simulation times preventing the determination of small BER values. We use JoSIM – an efficient simulator with SPICE syntax that allows for the simulation of superconducting components and noise sources with improved speed over older superconductor simulators. This speed improvement makes the Monte-Carlo method viable. The simulated BER is plotted against bias current with values in the low-BER region interpolated from the simulated values using MATLAB. We show how the results need to be used as a further qualifier of circuit performance for the characterization of a logic cell library. |
| Author | Delport, Johannes A. Hall, Tessa Fourie, Coenrad J. |
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| SubjectTerms | Bit error rate Circuit Design Electronic Design Automation Integrated circuit modeling Junctions Libraries Monte Carlo methods Monte Carlo simulation Resistors RSFQ Simulation Simulation Software Simulators Superconductivity Thermal noise |
| Title | Determination of the Bit Error Rate Due to Thermal Noise Using JoSIM Superconducting Circuit Simulator and the Monte Carlo Method |
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