Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems

• Published in: IEEE transactions on parallel and distributed systems Vol. 28; no. 3; pp. 838 - 849
• Main Authors: Chen, Yu-Yin, Chang, En-Jui, Hsin, Hsien-Kai, Chen, Kun-Chih, Wu, An-Yeu
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.03.2017; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithm design and analysis; Algorithms; Buffers; Communications traffic; Fault tolerance; Fault tolerant systems; fault-tolerant adaptive routing; Handheld computers; Manufacturing defects; Multiprocessing; Network management systems; Network-on-Chip (NoC); Networks; Occupancy; path diversity; Route planning; Routing; selection strategy; System on chip; Topology; Traffic congestion; Traffic flow
• ISSN: 1045-9219; 1558-2183
• DOI: 10.1109/TPDS.2016.2588482

Network-on-Chip (NoC) is the regular and scalable design architecture for chip multiprocessor (CMP) systems. With the increasing number of cores and the scaling of network in deep submicron (DSM) technology, the NoC systems become subject to manufacturing defects and have low production yield. Due to the fault issues, the reduction in the number of available routing paths for packet delivery may cause severe traffic congestion and even to a system crash. Therefore, the fault-tolerant routing algorithm is desired to maintain the correctness of system functionality. To overcome fault problems, conventional fault-tolerant routing algorithms employ fault information and buffer occupancy information of the local regions. However, the information only provides a limited view of traffic in the network, which still results in heavy traffic congestion. To achieve fault-resilient packet delivery and traffic balancing, this work proposes a Path-Diversity-Aware Fault-Tolerant Routing (PDA-FTR) algorithm, which simultaneously considers path diversity information and buffer information. Compared with other fault-tolerant routing algorithms, the proposed work can improve average saturation throughput by 175 percent with only 8.9 percent average area overhead and 7.1 percent average power overhead.