Accelerated Design Methodology for Dual-Input Doherty Power Amplifiers

• Published in: IEEE transactions on microwave theory and techniques Vol. 67; no. 10; pp. 3983 - 3995
• Main Authors: Liang, Chenyu, Roblin, Patrick, Hahn, Yunsik
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.10.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amplifier design; Circuit design; Current sources; Design; Design engineering; Doherty power amplifiers (DPAs); Impedance; Impedance measurement; Linearity; Load modeling; Microwave theory and techniques; nonlinear embedding; Planes; Power amplifiers; Power efficiency; Prototypes; Semiconductor devices; Software; Transistors
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2019.2924373

A novel design theory and the methodology are presented for dual-input Doherty power amplifiers (DPAs) in which the auxiliary transistor does not fully turn off at backoff power. Given the input parameters selected by the PA designer, a Doherty load modulation behavior is exactly implemented at the current-source reference planes of the transistors by solving for the characteristic impedance of the Doherty quarter-wave transformer and the common load. The Doherty output combiner at the package reference plane that sustains the desired dual-input DPA performance is then synthesized using nonlinear embedding and exactly implemented with a lossless and reciprocal circuit. The new analytic DPA design theory also provides an expanded design space, which facilitates the selection of the optimal design based on the gain, linearity, and efficiency tradeoff. The design methodology is implemented in a software program to enable the automatic design of a dual-input DPA prototype at the package reference planes within 24 s. To validate the theory and the design methodology, a 2-GHz dual-input asymmetric DPA is fabricated and measured. When excited with a 20-MHz local thermal equilibrium (LTE) signal with 9.55-dB peak-to-average power ratio (PAPR), the DPA achieves an average power-added efficiency (PAE) of 51.6% with an adjacent-channel-power-leakage ratio (ACLR) of -47.1 dBc after linearization.