Digitally Adaptive High-Fidelity Analog Array Signal Processing Resilient to Capacitive Multiplying DAC Inter-Stage Gain Error

This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient, high-resolution, and high-dimensional MIMO analog processing systems. In order to mitigate nonlinearity due to radix errors and capacitive mism...

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Published inIEEE transactions on circuits and systems. I, Regular papers Vol. 66; no. 11; pp. 4095 - 4107
Main Authors Joshi, Siddharth, Kim, Chul, Thomas, Chris M., Cauwenberghs, Gert
Format Journal Article
LanguageEnglish
Published New York IEEE 01.11.2019
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN1549-8328
1558-0806
DOI10.1109/TCSI.2019.2926447

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Abstract This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient, high-resolution, and high-dimensional MIMO analog processing systems. In order to mitigate nonlinearity due to radix errors and capacitive mismatch encountered in compact low-power MDAC realizations, we introduce stochastic successive approximation, or S 2 A, as an online optimization algorithm for adaptive array analog signal processing amenable to efficient implementation in massively parallel mixed-signal hardware. S 2 A offers a direct alternative to stochastic gradient descent overcoming several of its shortcomings, such as its sensitivity to model error, while improving on the rate and quality of convergence. S 2 A overcomes non-convergence typically encountered with gradient descent for non-convex optimization landscapes induced by a mismatch in capacitive multiplying digital-to-analog converter components when applied to adaptive analog signal processing. Experimental validation of S 2 A in mixed-signal hardware for real-time RF adaptive beamforming demonstrates 65 dB of over-the-air, multipath interferer suppression in fewer than 25 S 2 A iterations.
AbstractList This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient, high-resolution, and high-dimensional MIMO analog processing systems. In order to mitigate nonlinearity due to radix errors and capacitive mismatch encountered in compact low-power MDAC realizations, we introduce stochastic successive approximation, or S 2 A, as an online optimization algorithm for adaptive array analog signal processing amenable to efficient implementation in massively parallel mixed-signal hardware. S 2 A offers a direct alternative to stochastic gradient descent overcoming several of its shortcomings, such as its sensitivity to model error, while improving on the rate and quality of convergence. S 2 A overcomes non-convergence typically encountered with gradient descent for non-convex optimization landscapes induced by a mismatch in capacitive multiplying digital-to-analog converter components when applied to adaptive analog signal processing. Experimental validation of S 2 A in mixed-signal hardware for real-time RF adaptive beamforming demonstrates 65 dB of over-the-air, multipath interferer suppression in fewer than 25 S 2 A iterations.
This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient, high-resolution, and high-dimensional MIMO analog processing systems. In order to mitigate nonlinearity due to radix errors and capacitive mismatch encountered in compact low-power MDAC realizations, we introduce stochastic successive approximation , or S2A, as an online optimization algorithm for adaptive array analog signal processing amenable to efficient implementation in massively parallel mixed-signal hardware. S2A offers a direct alternative to stochastic gradient descent overcoming several of its shortcomings, such as its sensitivity to model error, while improving on the rate and quality of convergence. S2A overcomes non-convergence typically encountered with gradient descent for non-convex optimization landscapes induced by a mismatch in capacitive multiplying digital-to-analog converter components when applied to adaptive analog signal processing. Experimental validation of S2A in mixed-signal hardware for real-time RF adaptive beamforming demonstrates 65 dB of over-the-air, multipath interferer suppression in fewer than 25 S2A iterations.
Author Kim, Chul
Thomas, Chris M.
Cauwenberghs, Gert
Joshi, Siddharth
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10.1109/TCSI.2012.2189056
10.1109/TCSI.2017.2737986
10.1126/science.1231806
10.1109/ISCAS.1998.704515
10.1109/JSSC.2018.2878830
10.21437/Interspeech.2016-1562
10.1109/TSP.2010.2048321
10.1109/ISCAS.2002.1011470
10.1109/JSSC.2013.2272849
10.1109/72.485671
10.1145/2534169.2486033
10.1109/JSEN.2011.2113393
10.1038/nature14542
10.3934/ipi.2009.3.487
10.1109/TBCAS.2015.2500101
10.1109/TCSI.2003.821306
10.1109/82.633435
10.1109/ACSSC.2015.7421361
10.1109/JSSC.2016.2519398
10.1109/72.105429
10.1109/TCSI.2011.2107214
10.1109/TCSII.2015.2482618
10.1109/VLSIC.2016.7573509
10.1109/TNNLS.2012.2236572
10.1007/BF02020331
10.1007/s10107-015-0892-3
10.1038/nature16961
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References lee (ref13) 2016
ref34
ref15
ref36
ref31
ref30
ref33
ref11
ref32
ref10
ref2
celik (ref14) 2005
ref16
ref24
lippe (ref37) 1995
ref23
haykin (ref17) 2002; 2
ref20
ref22
siddharth (ref18) 2017
silver (ref1) 2016; 529
ref21
li (ref38) 2009; 3
kirk (ref25) 1993; 5
bankman (ref19) 2016
ref28
ref27
joshi (ref6) 2017
ref29
ref8
kim (ref12) 2016; 51
ref7
ref9
ref4
chiu (ref26) 2015
ref3
ref5
murmann (ref35) 2013
References_xml – ident: ref22
  doi: 10.1109/TCSII.2007.901575
– ident: ref7
  doi: 10.1109/TCSI.2012.2189056
– ident: ref21
  doi: 10.1109/TCSI.2017.2737986
– ident: ref3
  doi: 10.1126/science.1231806
– ident: ref31
  doi: 10.1109/ISCAS.1998.704515
– ident: ref15
  doi: 10.1109/JSSC.2018.2878830
– ident: ref5
  doi: 10.21437/Interspeech.2016-1562
– start-page: 418
  year: 2016
  ident: ref13
  article-title: 24.2 A 2.5 GHz 7.7 TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40 nm
  publication-title: IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers
– ident: ref29
  doi: 10.1109/TSP.2010.2048321
– ident: ref33
  doi: 10.1109/ISCAS.2002.1011470
– ident: ref16
  doi: 10.1109/JSSC.2013.2272849
– start-page: 187
  year: 2005
  ident: ref14
  article-title: Gradient flow independent component analysis in micropower VLSI
  publication-title: Proc Adv Neural Inf Process Syst
– ident: ref36
  doi: 10.1109/72.485671
– start-page: 364
  year: 2017
  ident: ref6
  article-title: 21.7 2pJ/MAC 14b 8 $\times $ 8 linear transform mixed-signal spatial filter in 65nm CMOS with 84dB interference suppression
  publication-title: IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers
– ident: ref8
  doi: 10.1145/2534169.2486033
– volume: 5
  start-page: 789
  year: 1993
  ident: ref25
  article-title: Analog VLSI implementation of multi-dimensional gradient descent
  publication-title: Proc Adv Neural Inf Process Syst
– ident: ref11
  doi: 10.1109/JSEN.2011.2113393
– start-page: 485
  year: 2015
  ident: ref26
  publication-title: Digital Adaptive Calibration of Data Converters Using Independent Component Analysis
– ident: ref2
  doi: 10.1038/nature14542
– volume: 3
  start-page: 487
  year: 2009
  ident: ref38
  article-title: Coordinate descent optimization for l1 minimization with application to compressed sensing; A greedy algorithm
  publication-title: Inverse Problems Imag
  doi: 10.3934/ipi.2009.3.487
– ident: ref9
  doi: 10.1109/TBCAS.2015.2500101
– start-page: 803
  year: 1995
  ident: ref37
  article-title: A study of parallel perturbative gradient descent
  publication-title: Proc Adv Neural Inf Process Syst
– ident: ref27
  doi: 10.1109/TCSI.2003.821306
– ident: ref23
  doi: 10.1109/82.633435
– volume: 2
  start-page: 478
  year: 2002
  ident: ref17
  publication-title: Adaptive Filter Theory
– ident: ref4
  doi: 10.1109/ACSSC.2015.7421361
– volume: 51
  start-page: 832
  year: 2016
  ident: ref12
  article-title: A 1.3 mW 48 MHz 4 channel MIMO baseband receiver with 65 dB harmonic rejection and 48.5 dB spatial signal separation
  publication-title: IEEE J Solid-State Circuits
  doi: 10.1109/JSSC.2016.2519398
– ident: ref24
  doi: 10.1109/72.105429
– ident: ref20
  doi: 10.1109/TCSI.2011.2107214
– start-page: 21
  year: 2016
  ident: ref19
  article-title: An 8-bit, 16 input, 3.2 pJ/op switchedcapacitor dot product circuit in 28-nm FDSOI CMOS
  publication-title: Proc IEEE Asian Solid-State Circuits Conf (A-SSCC)
– start-page: 1
  year: 2013
  ident: ref35
  article-title: On the use of redundancy in successive approximation A/D converters
  publication-title: Proc IEEE Int Conf Sampling Theory Appl (SampTA)
– ident: ref34
  doi: 10.1109/TCSII.2015.2482618
– ident: ref10
  doi: 10.1109/VLSIC.2016.7573509
– start-page: 1
  year: 2017
  ident: ref18
  article-title: From algorithms to devices: Enabling machine learning through ultra-low-power VLSI mixed-signal array processing
  publication-title: Proc IEEE Custom Integr Circuits Conf
– ident: ref28
  doi: 10.1109/TNNLS.2012.2236572
– ident: ref32
  doi: 10.1007/BF02020331
– ident: ref30
  doi: 10.1007/s10107-015-0892-3
– volume: 529
  start-page: 484
  year: 2016
  ident: ref1
  article-title: Mastering the game of Go with deep neural networks and tree search
  publication-title: Nature
  doi: 10.1038/nature16961
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Snippet This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient,...
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SubjectTerms Adaptive algorithms
Adaptive arrays
Adaptive systems
analog signal processing (ASP)
Array signal processing
Arrays
Beamforming
Capacitors
Computational geometry
Convergence
Convexity
Digital to analog conversion
Digital to analog converters
Error analysis
Hardware
Internet-of-Things (IoT)
least-mean-squares (LMS) adaptive filtering
Mathematical analysis
Matrix algebra
Matrix methods
MIMO (control systems)
mixed-signal matrix-vector multiplication (MVM)
multi-input multi-output (MIMO)
Multiplying digital-to-analog conversion (MDAC)
non-convex optimization
Optimization
Signal processing
Signal processing algorithms
Topology
Title Digitally Adaptive High-Fidelity Analog Array Signal Processing Resilient to Capacitive Multiplying DAC Inter-Stage Gain Error
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