Balderas-Contreras, T., Cumplido, R., & Rodríguez, G. (2014). Synthesizing VHDL from Activity Models in UML 2. International journal of circuit theory and applications, 42(5), 542-550. https://doi.org/10.1002/cta.1874
Chicago Style (17th ed.) CitationBalderas-Contreras, Tomás, René Cumplido, and Gustavo Rodríguez. "Synthesizing VHDL from Activity Models in UML 2." International Journal of Circuit Theory and Applications 42, no. 5 (2014): 542-550. https://doi.org/10.1002/cta.1874.
MLA (9th ed.) CitationBalderas-Contreras, Tomás, et al. "Synthesizing VHDL from Activity Models in UML 2." International Journal of Circuit Theory and Applications, vol. 42, no. 5, 2014, pp. 542-550, https://doi.org/10.1002/cta.1874.
Warning: These citations may not always be 100% accurate.