FPA Optimized Selective Harmonic Elimination in Symmetric-Asymmetric Reduced Switch Cascaded Multilevel Inverter

Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the ongoing improvement by reducing the converter size and enhancement in the voltage quality. In this article, a generalized cascaded MLI structure...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on industry applications Vol. 56; no. 3; pp. 2862 - 2870
Main Authors Panda, Kaibalya Prasad, Bana, Prabhat Ranjan, Panda, Gayadhar
Format Journal Article
LanguageEnglish
Published New York IEEE 01.05.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Algorithms
Asymmetry
Capacitors
Computer simulation
Converters
Electric potential
Flower pollination algorithm (FPA)
Frequency control
Harmonic analysis
Inverters
reduced components
selective harmonic elimination (SHE)
switched-diode multilevel inverter (SMLI)
Switches
symmetric–asymmetric multilevel inverter (MLI)
Through-silicon vias
Topology
Voltage
Workability
Online AccessGet full text
ISSN0093-9994
1939-9367
DOI10.1109/TIA.2020.2981601

Cover

Abstract Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the ongoing improvement by reducing the converter size and enhancement in the voltage quality. In this article, a generalized cascaded MLI structure is developed, which can operate in both symmetric and asymmetric modes. Comparative assessment in terms of the number of components and voltage stress warrants the design superiority. A new selective harmonic elimination (SHE) control using flower pollination algorithm (FPA) is investigated for the developed asymmetrical MLI. The salient features of the FPA such as less burdensome compilation and ability tos single-stage local and global search ascertain the elimination of the targeted harmonics through optimum angles computation. Moreover, the competence of the FPA is verified by comparing it with well-known SHE algorithms. Simulation analysis is carried out in MATLAB/Simulink environment, which validates the workability of the developed system. Experimental tests using fundamental and high switching frequency control techniques are further conducted under a dynamic environment to demonstrate the efficacy of the proposed methodology.
AbstractList Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the ongoing improvement by reducing the converter size and enhancement in the voltage quality. In this article, a generalized cascaded MLI structure is developed, which can operate in both symmetric and asymmetric modes. Comparative assessment in terms of the number of components and voltage stress warrants the design superiority. A new selective harmonic elimination (SHE) control using flower pollination algorithm (FPA) is investigated for the developed asymmetrical MLI. The salient features of the FPA such as less burdensome compilation and ability tos single-stage local and global search ascertain the elimination of the targeted harmonics through optimum angles computation. Moreover, the competence of the FPA is verified by comparing it with well-known SHE algorithms. Simulation analysis is carried out in MATLAB/Simulink environment, which validates the workability of the developed system. Experimental tests using fundamental and high switching frequency control techniques are further conducted under a dynamic environment to demonstrate the efficacy of the proposed methodology.
Author Panda, Gayadhar
Bana, Prabhat Ranjan
Panda, Kaibalya Prasad
Author_xml – sequence: 1
  givenname: Kaibalya Prasad
  orcidid: 0000-0001-7486-6139
  surname: Panda
  fullname: Panda, Kaibalya Prasad
  email: kaibalyapanda@nitm.ac.in
  organization: Department of Electrical Engineering, National Institute of Technology, Shillong, Meghalaya, India
– sequence: 2
  givenname: Prabhat Ranjan
  orcidid: 0000-0002-9978-7776
  surname: Bana
  fullname: Bana, Prabhat Ranjan
  email: prabhat.bana@nitm.ac.in
  organization: Department of Electrical Engineering, National Institute of Technology, Shillong, Meghalaya, India
– sequence: 3
  givenname: Gayadhar
  surname: Panda
  fullname: Panda, Gayadhar
  email: gayadhar.panda@nitm.ac.in
  organization: Department of Electrical Engineering, National Institute of Technology, Shillong, Meghalaya, India
BookMark eNp9kMtLAzEQxoNUsK3eBS8Bz1vz2FeOS2ltoVKx9RzS7Cym7MskrdS_3q2tHjwIAzPDfL8Z5hugXt3UgNAtJSNKiXhYz7MRI4yMmEhpTOgF6lPBRSB4nPRQnxDBAyFEeIUGzm0JoWFEwz5qp88ZXrbeVOYTcryCErQ3e8AzZaumNhpPym5WK2-aGpsarw5VBd4aHWTup8QvkO_0Ef8wXr_hsXJa5V3_tCu9KWEPJZ7Xe7Ae7DW6LFTp4Oach-h1OlmPZ8Fi-TgfZ4tAM0F9oAjkrAAiNBUbHUMSJ1EEJE642rA04nmRqCLVCY3yNIyETpkOQYTpJi5AqZTyIbo_7W1t874D5-W22dm6OykZFxGNuuCdKj6ptG2cs1BIbfz3r94qU0pK5NFd2bkrj-7Ks7sdSP6ArTWVsof_kLsTYgDgVy5IyFga8y-Vnohg
CODEN ITIACR
CitedBy_id crossref_primary_10_2139_ssrn_3940131
crossref_primary_10_1007_s00521_022_07980_1
crossref_primary_10_3390_su14010310
crossref_primary_10_1109_ACCESS_2023_3274607
crossref_primary_10_1142_S0218126623501815
crossref_primary_10_1007_s40998_024_00732_y
crossref_primary_10_1109_TIA_2020_3018422
crossref_primary_10_1515_ijeeps_2024_0140
crossref_primary_10_1002_cta_2926
crossref_primary_10_1109_TIA_2023_3272539
crossref_primary_10_1186_s43067_023_00071_8
crossref_primary_10_1007_s00202_022_01556_x
crossref_primary_10_1049_pel2_12238
crossref_primary_10_3390_su151813376
crossref_primary_10_1007_s11042_024_18285_x
crossref_primary_10_1109_ACCESS_2023_3327309
crossref_primary_10_1080_15567036_2022_2089299
crossref_primary_10_1038_s41598_024_84678_5
crossref_primary_10_1002_cta_3582
crossref_primary_10_1109_TIA_2021_3068076
crossref_primary_10_1155_2023_9690344
crossref_primary_10_1002_cta_3140
crossref_primary_10_1080_02564602_2022_2143444
crossref_primary_10_1109_ACCESS_2021_3098190
crossref_primary_10_1109_TIA_2021_3110832
crossref_primary_10_1016_j_prime_2024_100733
crossref_primary_10_1108_CW_06_2021_0162
crossref_primary_10_1109_TPEL_2022_3147258
crossref_primary_10_3390_electronics12041058
crossref_primary_10_1109_TIA_2021_3116217
crossref_primary_10_1155_2020_8856040
crossref_primary_10_1109_JESTIE_2021_3087967
crossref_primary_10_1016_j_egyr_2022_01_122
crossref_primary_10_1016_j_epsr_2024_110573
crossref_primary_10_1109_ACCESS_2024_3366549
crossref_primary_10_1109_ACCESS_2021_3092691
crossref_primary_10_3390_electronics10040374
crossref_primary_10_1155_2021_6642317
crossref_primary_10_29121_ijetmr_v10_i1_2023_1278
crossref_primary_10_1007_s40998_023_00676_9
crossref_primary_10_1016_j_asej_2023_102358
crossref_primary_10_3390_app12030992
crossref_primary_10_3390_en14217249
crossref_primary_10_1002_cta_3077
crossref_primary_10_1016_j_csite_2025_105897
Cites_doi 10.1109/TIA.2019.2904923
10.1109/TIA.2019.2933378
10.1109/TIE.2017.2772209
10.1109/PEDES.2018.8707792
10.1109/TIE.2013.2282606
10.1109/TPEL.2014.2355226
10.1109/TPEL.2018.2819724
10.1109/TIA.2018.2831177
10.1109/TIA.2010.2041620
10.1109/TIE.2016.2520913
10.1109/TIE.2016.2627019
10.1109/TPEL.2017.2751419
10.1109/TIA.2011.2161533
10.1109/TIA.2017.2775178
10.1109/TIA.2013.2282494
10.1109/TIE.2013.2290769
10.1109/TEC.2017.2710352
10.1109/TII.2016.2529589
10.1109/TIE.2014.2336601
10.1109/TII.2019.2953071
10.1109/JESTPE.2018.2885209
10.1016/j.procs.2013.05.251
10.1109/TIE.2019.2914636
10.1109/TIA.2018.2859040
10.4103/0377-2063.110616
10.1109/TIA.2015.2437351
10.1109/TIE.2017.2688968
10.1109/TIE.2015.2506626
10.1109/TCSII.2020.2975299
10.1109/TIE.2010.2043039
10.1109/TPEL.2003.823198
10.1109/TIA.2014.2354396
10.1109/TIA.2017.2737406
10.1109/TIE.2014.2331012
10.1109/TPEL.2017.2669377
10.1109/TIA.2009.2018978
10.1109/JESTPE.2016.2555995
10.1109/ACCESS.2019.2913447
10.1109/TIA.2016.2527622
ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020
DBID 97E
RIA
RIE
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
DOI 10.1109/TIA.2020.2981601
DatabaseName IEEE All-Society Periodicals Package (ASPP) 2005–Present
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
Computer and Information Systems Abstracts
Electronics & Communications Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
DatabaseTitle CrossRef
Technology Research Database
Computer and Information Systems Abstracts – Academic
Electronics & Communications Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts Professional
DatabaseTitleList
Technology Research Database
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 1939-9367
EndPage 2870
ExternalDocumentID 10_1109_TIA_2020_2981601
9042286
Genre orig-research
GrantInformation_xml – fundername: Institution of Engineers (India) R&D Grant-in-Aid scheme
  grantid: RDDR2017017
– fundername: Government of India Project
  grantid: EMR/2017/001880
– fundername: Department of Science and Technology (DST)
GroupedDBID -~X
.DC
0R~
29I
3EH
4.4
5GY
5VS
6IK
85S
97E
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABQJQ
ABVLG
ACGFO
ACGFS
ACIWK
ACNCT
AENEX
AETIX
AGQYO
AGSQL
AHBIQ
AI.
AIBXA
AKJIK
AKQYR
ALLEH
ALMA_UNASSIGNED_HOLDINGS
ASUFR
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CS3
DU5
EBS
EJD
F5P
HZ~
H~9
IAAWW
IBMZZ
ICLAB
IFIPE
IFJZH
IPLJI
JAVBF
LAI
M43
MS~
O9-
OCL
P2P
RIA
RIE
RNS
TAE
TN5
VH1
VJK
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
ID FETCH-LOGICAL-c291t-a0ed2fe09c19bc6e76755e0673ab2853df7af8c715d8459c82c4e948b6feaa813
IEDL.DBID RIE
ISSN 0093-9994
IngestDate Mon Jun 30 10:12:24 EDT 2025
Wed Oct 01 03:52:39 EDT 2025
Thu Apr 24 23:02:24 EDT 2025
Wed Aug 27 02:41:20 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 3
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
https://doi.org/10.15223/policy-029
https://doi.org/10.15223/policy-037
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c291t-a0ed2fe09c19bc6e76755e0673ab2853df7af8c715d8459c82c4e948b6feaa813
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ORCID 0000-0001-7486-6139
0000-0002-9978-7776
PQID 2395155153
PQPubID 85463
PageCount 9
ParticipantIDs crossref_citationtrail_10_1109_TIA_2020_2981601
proquest_journals_2395155153
crossref_primary_10_1109_TIA_2020_2981601
ieee_primary_9042286
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2020-May-June
2020-5-00
20200501
PublicationDateYYYYMMDD 2020-05-01
PublicationDate_xml – month: 05
  year: 2020
  text: 2020-May-June
PublicationDecade 2020
PublicationPlace New York
PublicationPlace_xml – name: New York
PublicationTitle IEEE transactions on industry applications
PublicationTitleAbbrev TIA
PublicationYear 2020
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
References ref35
ref13
ref34
ref12
tirupathi (ref9) 2019; 55
ref37
ref15
muñoz (ref3) 2016
ref36
ref14
ref31
ref30
ref33
ref11
ref10
ref2
ref1
ref39
ref17
ref38
ref16
ref19
ref18
ref24
ref23
ref26
ref25
ref20
ref41
ref22
ref21
ref28
ref27
sen (ref32) 2019; 9
ref29
ref8
ref7
ref4
ref6
ref5
ref40
References_xml – ident: ref29
  doi: 10.1109/TIA.2019.2904923
– volume: 55
  start-page: 6073
  year: 2019
  ident: ref9
  article-title: A seven-level VSI with a front-end cascaded three-level inverter and flying capacitor fed H-bridge
  publication-title: IEEE Trans Ind Appl
  doi: 10.1109/TIA.2019.2933378
– ident: ref20
  doi: 10.1109/TIE.2017.2772209
– ident: ref35
  doi: 10.1109/PEDES.2018.8707792
– ident: ref13
  doi: 10.1109/TIE.2013.2282606
– ident: ref33
  doi: 10.1109/TPEL.2014.2355226
– volume: 9
  start-page: 32
  year: 2019
  ident: ref32
  article-title: Firefly assisted genetic algorithm for selective harmonic elimination in PV interfacing reduced switch multilevel inverter
  publication-title: Int Journal of Renewable Energy
– ident: ref38
  doi: 10.1109/TPEL.2018.2819724
– ident: ref22
  doi: 10.1109/TIA.2018.2831177
– ident: ref39
  doi: 10.1109/TIA.2010.2041620
– ident: ref21
  doi: 10.1109/TIE.2016.2520913
– ident: ref15
  doi: 10.1109/TIE.2016.2627019
– ident: ref26
  doi: 10.1109/TPEL.2017.2751419
– ident: ref7
  doi: 10.1109/TIA.2011.2161533
– ident: ref34
  doi: 10.1109/TIA.2017.2775178
– ident: ref11
  doi: 10.1109/TIA.2013.2282494
– start-page: 1
  year: 2016
  ident: ref3
  article-title: Asymmetric multilevel topology for photovoltaic energy injection to microgrids
  publication-title: Proc 2016 IEEE 17th Workshop Control Model Power Electron
– ident: ref24
  doi: 10.1109/TIE.2013.2290769
– ident: ref30
  doi: 10.1109/TEC.2017.2710352
– ident: ref10
  doi: 10.1109/TII.2016.2529589
– ident: ref17
  doi: 10.1109/TIE.2014.2336601
– ident: ref31
  doi: 10.1109/TII.2019.2953071
– ident: ref14
  doi: 10.1109/JESTPE.2018.2885209
– ident: ref41
  doi: 10.1016/j.procs.2013.05.251
– ident: ref18
  doi: 10.1109/TIE.2019.2914636
– ident: ref1
  doi: 10.1109/TIA.2018.2859040
– ident: ref36
  doi: 10.4103/0377-2063.110616
– ident: ref5
  doi: 10.1109/TIA.2015.2437351
– ident: ref25
  doi: 10.1109/TIE.2017.2688968
– ident: ref19
  doi: 10.1109/TIE.2015.2506626
– ident: ref23
  doi: 10.1109/TCSII.2020.2975299
– ident: ref2
  doi: 10.1109/TIE.2010.2043039
– ident: ref37
  doi: 10.1109/TPEL.2003.823198
– ident: ref6
  doi: 10.1109/TIA.2014.2354396
– ident: ref8
  doi: 10.1109/TIA.2017.2737406
– ident: ref16
  doi: 10.1109/TIE.2014.2331012
– ident: ref27
  doi: 10.1109/TPEL.2017.2669377
– ident: ref4
  doi: 10.1109/TIA.2009.2018978
– ident: ref40
  doi: 10.1109/JESTPE.2016.2555995
– ident: ref12
  doi: 10.1109/ACCESS.2019.2913447
– ident: ref28
  doi: 10.1109/TIA.2016.2527622
SSID ssj0014514
Score 2.5197794
Snippet Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 2862
SubjectTerms Algorithms
Asymmetry
Capacitors
Computer simulation
Converters
Electric potential
Flower pollination algorithm (FPA)
Frequency control
Harmonic analysis
Inverters
reduced components
selective harmonic elimination (SHE)
switched-diode multilevel inverter (SMLI)
Switches
symmetric–asymmetric multilevel inverter (MLI)
Through-silicon vias
Topology
Voltage
Workability
Title FPA Optimized Selective Harmonic Elimination in Symmetric-Asymmetric Reduced Switch Cascaded Multilevel Inverter
URI https://ieeexplore.ieee.org/document/9042286
https://www.proquest.com/docview/2395155153
Volume 56
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVIEE
  databaseName: IEEE Electronic Library (IEL)
  customDbUrl:
  eissn: 1939-9367
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0014514
  issn: 0093-9994
  databaseCode: RIE
  dateStart: 19720101
  isFulltext: true
  titleUrlDefault: https://ieeexplore.ieee.org/
  providerName: IEEE
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LaxsxEB6SnNpDmjYNcR5Fh14Klb2rfUg6mhDjFtKWPCC3RSuNwMR2QmxTkl8fjXbXhLSE3HQYLYJPj5mdme8D-JopKTCzGTfSKk4OL9fOam4LaYwUpfIx0X72qxxf5T-vi-sN-L7uhUHEWHyGfRrGXL67tSv6VTbQkbCq3IRNqcqmV2udMchbHu8QofPg9ORdSjLRg8sfwxAIiqQvtErLVv6le4Kipso_F3F8XUYf4KxbV1NUctNfLeu-fXxB2fjWhe_AdutmsmGzLz7CBs4_wftn5IO7cDf6M2S_w40xmzyiYxdRECfcfWxs7mdEmMtOp1Hyi6Bjkzm7eJjNSH_L8uGiG7Jzon6l6X8nAX92YhZUcO9YbOydUkUSIyoPKhz9DFej08uTMW_1F7gVOl1yk6ATHhNtU13bEon3pUBStjG1CM-889J4ZWVaOJUX2iphc9S5qkuPxqg024Ot-e0c94E5TzxoZZLJJNjUaGSO3nspnS60164Hgw6Syrbk5KSRMa1ikJLoKoBYEYhVC2IPvq1n3DXEHK_Y7hIma7sWjh4cdahX7cldVCLTUfWmyA7-P-sQ3tG3m6LHI9ha3q_wODgmy_pL3JFP1nLgTg
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1NbxMxEB2VcoAeoFBQA6X4wAUJJ7tee20fo6pRCk1BNJV6W3n9IUUkadUkQvTX4_HuRggQ4ubDWGvp-WNmZ-Y9gHeFkswXtqBGWkXR4aXaWU2tkMZIVqqQEu2Ti3J8xT9ei-sd-LDthfHep-Iz38dhyuW7G7vBX2UDnQirygfwUHDORdOttc0Z8JbJO8boNLo9vEtKZnowPRvGUJBlfaZVXrYCMN0jlFRV_riK0_syegqTbmVNWcm3_mZd9-39b6SN_7v0fXjSOppk2OyMZ7Djl89h7xf6wQO4HX0Zks_xzljM7r0jl0kSJ95-ZGzuFkiZS07nSfQLwSOzJbn8sVigApelw1U3JF-R_BWnf5_FHUBOzApL7h1Jrb1zrEkiSOaBpaMv4Gp0Oj0Z01aBgVqm8zU1mXcs-EzbXNe29Mj8Ijxq25iaxYfeBWmCsjIXTnGhrWKWe81VXQZvjMqLl7C7vFn6QyAuIBNamRUyiza1N5L7EIKUTgsdtOvBoIOksi09OapkzKsUpmS6iiBWCGLVgtiD99sZtw01xz9sDxCTrV0LRw-OOtSr9uyuKlbopHsjild_n_UWHo2nk_Pq_Ozi02t4jN9pSiCPYHd9t_Fvopuyro_T7vwJupfjmw
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=FPA+Optimized+Selective+Harmonic+Elimination+in+Symmetric%E2%80%93Asymmetric+Reduced+Switch+Cascaded+Multilevel+Inverter&rft.jtitle=IEEE+transactions+on+industry+applications&rft.au=Panda%2C+Kaibalya+Prasad&rft.au=Bana%2C+Prabhat+Ranjan&rft.au=Panda%2C+Gayadhar&rft.date=2020-05-01&rft.issn=0093-9994&rft.eissn=1939-9367&rft.volume=56&rft.issue=3&rft.spage=2862&rft.epage=2870&rft_id=info:doi/10.1109%2FTIA.2020.2981601&rft.externalDBID=n%2Fa&rft.externalDocID=10_1109_TIA_2020_2981601
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0093-9994&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0093-9994&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0093-9994&client=summon