Interval graph algorithms for two-dimensional multiple folding of array-based VLSI layouts - Ho, K.C.; Vrudhula, S.B.K. (IEEE transactions on computer-aided design of integrated circuits and systems, 1994)
Keywords: Applied sciences; Compaction; Constraint theory; Control systems; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; Integrated circuits; Logic arrays; Programmable logic arrays; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Very large scale integration; Logic circuit; Interval graph; VLSI circuit; Integrated circuit; Optimization method; Theoretical study; Compaction; Algorithm; Computer aided design