Array processor for block adaptive LS FIR filtering

In this paper the architecture for the realization of a new, highly-parallel, block-type, order recursive algorithm for LS FIR filtering is introduced. A linear array of p processing elements is used, implementing this algorithm for p order in linear time, O( p). Using a suitable scheduling of the a...

Full description

Saved in:
Bibliographic Details
Published inSignal processing Vol. 39; no. 1; pp. 215 - 222
Main Authors Nikolaidis, S.S., Theodoridis, S., Goutis, C.E.
Format Journal Article
LanguageEnglish
Published Elsevier B.V 1994
Subjects
Online AccessGet full text
ISSN0165-1684
1872-7557
DOI10.1016/0165-1684(94)90135-X

Cover

Abstract In this paper the architecture for the realization of a new, highly-parallel, block-type, order recursive algorithm for LS FIR filtering is introduced. A linear array of p processing elements is used, implementing this algorithm for p order in linear time, O( p). Using a suitable scheduling of the algorithm and a pipeline divider, a three fold reduction of hardware is achieved, without significant degradation in time performance, compared to the fully parallel realization. Furthermore, the computation of the correction sums, needed for the initialization of the system, is performed on the existing linear array resulting in additional hardware saving. In dieser Arbeit wird die Architektur zur Realisierung eines neuen Algorithmus zur FIR-Filterung vorgestellt, der nach der Methode der kleinsten Quadrate arbeitet und dabei hochgradig parallel, blockorientiert und ordnungsrekursiv ist. Ein lineares Feld von p Prozessorelementen wird verwendet, um diese Algorithmen für die Ordung p in linear Zeit O( p) umzusetzen. Durch einen geeigneten Abarbeitungsplan für den Algorithms und einen Pipeline-Teiler kann eine Verringerung des Hardwareaufwands auf ein Drittel erzielt werden, ohne daβ sich — gemessen an der vollständig parallen Realisierung — wesentliche Einbuβen in der Verarbeitungsgeschwindigkeit ergeben. Darüber hinaus wird die zur Initialisierung des Systems erforderliche Berechnung der Korrelationssummen auf dem vorhandenen linearen Prozessorfeld ausgeführt, wodurch eine zusätzliche Hardware-einsparung erreicht wird. Dans cet article l'architecture pour la réalisation d'un nouvel algorithme récursif hautement parallèle basé sur des blocks pour le filtrage LS FIR est introduit. Un tableau linéaire à p éléments est utilisé, pour l'implémentation de cet algorithme linéaire temporellement à l'ordre p, O p. En utilisant une structure adaptée de l'algorithme et un pipeline de division, une réduction d'un facteur trois de l'hardware est obtenue, sans dégradation significative des performances temporelles en comparison avec une implémentation totalement parallèle. De plus, le calcul des sommes de corrélation, nécessaire pour l'initialisation du système, est fait grâce au tableau linéaire existant résultant d'une sauvegarde hardware additionelle.
AbstractList In this paper the architecture for the realization of a new, highly-parallel, block-type, order recursive algorithm for LS FIR filtering is introduced. A linear array of p processing elements is used, implementing this algorithm for p order in linear time, O( p). Using a suitable scheduling of the algorithm and a pipeline divider, a three fold reduction of hardware is achieved, without significant degradation in time performance, compared to the fully parallel realization. Furthermore, the computation of the correction sums, needed for the initialization of the system, is performed on the existing linear array resulting in additional hardware saving. In dieser Arbeit wird die Architektur zur Realisierung eines neuen Algorithmus zur FIR-Filterung vorgestellt, der nach der Methode der kleinsten Quadrate arbeitet und dabei hochgradig parallel, blockorientiert und ordnungsrekursiv ist. Ein lineares Feld von p Prozessorelementen wird verwendet, um diese Algorithmen für die Ordung p in linear Zeit O( p) umzusetzen. Durch einen geeigneten Abarbeitungsplan für den Algorithms und einen Pipeline-Teiler kann eine Verringerung des Hardwareaufwands auf ein Drittel erzielt werden, ohne daβ sich — gemessen an der vollständig parallen Realisierung — wesentliche Einbuβen in der Verarbeitungsgeschwindigkeit ergeben. Darüber hinaus wird die zur Initialisierung des Systems erforderliche Berechnung der Korrelationssummen auf dem vorhandenen linearen Prozessorfeld ausgeführt, wodurch eine zusätzliche Hardware-einsparung erreicht wird. Dans cet article l'architecture pour la réalisation d'un nouvel algorithme récursif hautement parallèle basé sur des blocks pour le filtrage LS FIR est introduit. Un tableau linéaire à p éléments est utilisé, pour l'implémentation de cet algorithme linéaire temporellement à l'ordre p, O p. En utilisant une structure adaptée de l'algorithme et un pipeline de division, une réduction d'un facteur trois de l'hardware est obtenue, sans dégradation significative des performances temporelles en comparison avec une implémentation totalement parallèle. De plus, le calcul des sommes de corrélation, nécessaire pour l'initialisation du système, est fait grâce au tableau linéaire existant résultant d'une sauvegarde hardware additionelle.
In this paper the architecture for the realization of a new, highly-parallel, block-type, order recursive algorithm for LS FIR filtering is introduced. A linear array of p processing elements is used, implementing this algorithm for p order in linear time, O(p). Using a suitable scheduling of the algorithm and a pipeline divider, a three fold reduction of hardware is achieved, without significant degradation in time performance, compared to the fully parallel realization. Furthermore, the computation of the correction sums, needed for the initialization of the system, is performed on the existing linear array resulting in additional hardware saving.
Author Theodoridis, S.
Goutis, C.E.
Nikolaidis, S.S.
Author_xml – sequence: 1
  givenname: S.S.
  surname: Nikolaidis
  fullname: Nikolaidis, S.S.
  email: nikolaid@gr.patvx1
  organization: VLSI Design Laboratory, Department of Electrical Engineering, University of Patras, 26110 Patras, Greece
– sequence: 2
  givenname: S.
  surname: Theodoridis
  fullname: Theodoridis, S.
  organization: VLSI Design Laboratory, Department of Computer Engineering, University of Patras, 26110 Patras, Greece
– sequence: 3
  givenname: C.E.
  surname: Goutis
  fullname: Goutis, C.E.
  organization: VLSI Design Laboratory, Department of Electrical Engineering, University of Patras, 26110 Patras, Greece
BookMark eNp9kEtLAzEUhYNUsK3-AxezEl2MJpkkM9kIpVgtFAQf0F3I445EpzM1mRb6781QcSncw91853LPmaBR27WA0CXBtwQTcZfEcyIqdi3ZjcSk4Pn6BI1JVdK85LwcofEfcoYmMX5inCiBx6iYhaAP2TZ0FmLsQlYnmaazX5l2etv7PWSr12yxfMlq3_QQfPtxjk5r3US4-N1T9L54eJs_5avnx-V8tsotrVifG1fo2kgqNKYGGCOy0IQJWxpaa8yp1hXXGFfWOUaJrR0rSseNEVJKbrgopujqeDd9972D2KuNjxaaRrfQ7aKiglclK3EC2RG0oYsxQK22wW90OCiC1dCQGuKrIb6SaYaG1DrZ7o82SCH2HoKK1kNrwfkAtleu8_8f-AESqW3_
Cites_doi 10.1109/29.103062
10.1109/TASSP.1987.1165083
10.1109/29.45620
ContentType Journal Article
Copyright 1994
Copyright_xml – notice: 1994
DBID AAYXX
CITATION
7SC
8FD
JQ2
L7M
L~C
L~D
DOI 10.1016/0165-1684(94)90135-X
DatabaseName CrossRef
Computer and Information Systems Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
DatabaseTitle CrossRef
Computer and Information Systems Abstracts
Technology Research Database
Computer and Information Systems Abstracts – Academic
Advanced Technologies Database with Aerospace
ProQuest Computer Science Collection
Computer and Information Systems Abstracts Professional
DatabaseTitleList
Computer and Information Systems Abstracts
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 1872-7557
EndPage 222
ExternalDocumentID 10_1016_0165_1684_94_90135_X
016516849490135X
GroupedDBID --K
--M
-~X
.DC
.~1
0R~
123
1B1
1~.
1~5
4.4
457
4G.
53G
5VS
7-5
71M
8P~
9JN
AABNK
AACTN
AAEDT
AAEDW
AAIAV
AAIKJ
AAKOC
AALRI
AAOAW
AAQFI
AAQXK
AAXUO
AAYFN
ABBOA
ABFNM
ABFRF
ABMAC
ABXDB
ABYKQ
ACDAQ
ACGFO
ACGFS
ACNNM
ACRLP
ACZNC
ADBBV
ADEZE
ADJOM
ADMUD
ADTZH
AEBSH
AECPX
AEFWE
AEKER
AENEX
AFKWA
AFTJW
AGHFR
AGUBO
AGYEJ
AHHHB
AHJVU
AHZHX
AIALX
AIEXJ
AIKHN
AITUG
AJBFU
AJOXV
ALMA_UNASSIGNED_HOLDINGS
AMFUW
AMRAJ
AOUOD
ASPBG
AVWKF
AXJTR
AZFZN
BJAXD
BKOJK
BLXMC
CS3
DU5
EBS
EFJIC
EFLBG
EJD
EO8
EO9
EP2
EP3
F0J
F5P
FDB
FEDTE
FGOYB
FIRID
FNPLU
FYGXN
G-Q
G8K
GBLVA
GBOLZ
HLZ
HVGLF
HZ~
IHE
J1W
JJJVA
KOM
LG9
M41
MO0
N9A
O-L
O9-
OAUVE
OZT
P-8
P-9
P2P
PC.
Q38
R2-
RIG
ROL
RPZ
SBC
SDF
SDG
SDP
SES
SEW
SPC
SPCBC
SST
SSV
SSZ
T5K
TAE
TN5
WUQ
XPP
ZMT
~02
~G-
AATTM
AAXKI
AAYWO
AAYXX
ABDPE
ABJNI
ABWVN
ACLOT
ACRPL
ACVFH
ADCNI
ADNMO
AEIPS
AEUPX
AFJKZ
AFPUW
AGQPQ
AIGII
AIIUN
AKBMS
AKRWK
AKYEP
ANKPU
APXCP
CITATION
EFKBS
~HD
7SC
8FD
JQ2
L7M
L~C
L~D
ID FETCH-LOGICAL-c284t-bd3afb926a02be44193a146c7b2fa052aa85a008cdd421cfd437d5bb69995b563
ISSN 0165-1684
IngestDate Thu Oct 02 05:45:03 EDT 2025
Wed Oct 01 01:45:22 EDT 2025
Fri Feb 23 02:26:44 EST 2024
IsPeerReviewed true
IsScholarly true
Issue 1
Keywords Least square FIR filtering
Block adaptive processing
Array processor
Language English
License https://www.elsevier.com/tdm/userlicense/1.0
LinkModel OpenURL
MergedId FETCHMERGED-LOGICAL-c284t-bd3afb926a02be44193a146c7b2fa052aa85a008cdd421cfd437d5bb69995b563
Notes ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
PQID 26587470
PQPubID 23500
PageCount 8
ParticipantIDs proquest_miscellaneous_26587470
crossref_primary_10_1016_0165_1684_94_90135_X
elsevier_sciencedirect_doi_10_1016_0165_1684_94_90135_X
ProviderPackageCode CITATION
AAYXX
PublicationCentury 1900
PublicationDate 1994-00-00
PublicationDateYYYYMMDD 1994-01-01
PublicationDate_xml – year: 1994
  text: 1994-00-00
PublicationDecade 1990
PublicationTitle Signal processing
PublicationYear 1994
Publisher Elsevier B.V
Publisher_xml – name: Elsevier B.V
References Orfanidis (BIB5) 1988
Theodoridis, Kalouptsidis, Bakirtzis (BIB8) February 1990
Eldon (BIB2) May 1988
Kalouptsidis, Theodoridis (BIB3) November 1987
Proakis, Manolakis (BIB6) 1988
Theodoridis (BIB7) January 1990
Carayanis, Koukoutsis, Manolakis, Halkias (BIB1) March 1985
Kung (BIB4) 1988
Kalouptsidis (10.1016/0165-1684(94)90135-X_BIB3) 1987
Carayanis (10.1016/0165-1684(94)90135-X_BIB1) 1985
Orfanidis (10.1016/0165-1684(94)90135-X_BIB5) 1988
Theodoridis (10.1016/0165-1684(94)90135-X_BIB7) 1990
Proakis (10.1016/0165-1684(94)90135-X_BIB6) 1988
Theodoridis (10.1016/0165-1684(94)90135-X_BIB8) 1990
Eldon (10.1016/0165-1684(94)90135-X_BIB2) 1988
Kung (10.1016/0165-1684(94)90135-X_BIB4) 1988
References_xml – start-page: 587
  year: May 1988
  end-page: 591
  ident: BIB2
  article-title: A systolic integrated circuit integer divider
  publication-title: Proc. Internat. Conf. on Systolic Arrays
– start-page: 260
  year: February 1990
  end-page: 270
  ident: BIB8
  article-title: Pipeline Algorithm for LS FIR Filters with Symmetric Impulse Response
  publication-title: IEEE ASSP-38
– start-page: 1565
  year: November 1987
  end-page: 1569
  ident: BIB3
  article-title: Parallel implementation of efficient LS algorithm for filtering and prediction
  publication-title: IEEE ASSP-35
– year: 1988
  ident: BIB6
  article-title: An introduction to Digital Signal Processing
– year: March 1985
  ident: BIB1
  article-title: A new look on the parallel implementation of the Schur algorithm for the solution of Toeplitz equations
  publication-title: ICASSP-85
– year: 1988
  ident: BIB4
  article-title: VLSI Array Processors
– start-page: 81
  year: January 1990
  end-page: 90
  ident: BIB7
  article-title: Pipeline architecture for block adaptive LS FIR filtering and prediction
  publication-title: IEEE ASSP-38
– year: 1988
  ident: BIB5
  article-title: Optimal Signal Processing
– start-page: 587
  year: 1988
  ident: 10.1016/0165-1684(94)90135-X_BIB2
  article-title: A systolic integrated circuit integer divider
– year: 1988
  ident: 10.1016/0165-1684(94)90135-X_BIB5
– start-page: 260
  year: 1990
  ident: 10.1016/0165-1684(94)90135-X_BIB8
  article-title: Pipeline Algorithm for LS FIR Filters with Symmetric Impulse Response
  publication-title: IEEE ASSP-38
  doi: 10.1109/29.103062
– year: 1985
  ident: 10.1016/0165-1684(94)90135-X_BIB1
  article-title: A new look on the parallel implementation of the Schur algorithm for the solution of Toeplitz equations
  publication-title: ICASSP-85
– start-page: 1565
  year: 1987
  ident: 10.1016/0165-1684(94)90135-X_BIB3
  article-title: Parallel implementation of efficient LS algorithm for filtering and prediction
  publication-title: IEEE ASSP-35
  doi: 10.1109/TASSP.1987.1165083
– year: 1988
  ident: 10.1016/0165-1684(94)90135-X_BIB6
– start-page: 81
  year: 1990
  ident: 10.1016/0165-1684(94)90135-X_BIB7
  article-title: Pipeline architecture for block adaptive LS FIR filtering and prediction
  publication-title: IEEE ASSP-38
  doi: 10.1109/29.45620
– year: 1988
  ident: 10.1016/0165-1684(94)90135-X_BIB4
SSID ssj0001360
Score 1.425411
Snippet In this paper the architecture for the realization of a new, highly-parallel, block-type, order recursive algorithm for LS FIR filtering is introduced. A...
SourceID proquest
crossref
elsevier
SourceType Aggregation Database
Index Database
Publisher
StartPage 215
SubjectTerms Array processor
Block adaptive processing
Least square FIR filtering
Title Array processor for block adaptive LS FIR filtering
URI https://dx.doi.org/10.1016/0165-1684(94)90135-X
https://www.proquest.com/docview/26587470
Volume 39
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVLSH
  databaseName: Elsevier Journals
  customDbUrl:
  mediaType: online
  eissn: 1872-7557
  dateEnd: 99991231
  omitProxy: true
  ssIdentifier: ssj0001360
  issn: 0165-1684
  databaseCode: AKRWK
  dateStart: 19930101
  isFulltext: true
  providerName: Library Specific Holdings
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV1JixNBFC40c9GDuOK41kFECaXd1V2V9DHIhNGJI0wS7FtRW4sMpGPbc9Bf76uuJcGFUSEUoXoj7wvvff1WhJ5JYzNtK0am0oUZlZ4SqaY54RVwCVvqXFsX0X1_yo_X5bua1bupa0N1Sa9e6e-_rSv5H1RhD3B1VbL_gGy6KWzAd8AXVkAY1r_CeNZ18tt463P9286nXoJ1Oh9LI7dDUtBiOZ6_PXPtl_qh6eA-GV1-_uS4aLg-HhyCFOet6x3p-w8sd-5RV8lv2i4dSdk7LfxK36wglDaYUFlX7nsVOSM597Paolr0PYYi_KFGMWo5tmcwqS8s_kUXe7dAujcQ5goWF4crGKl39ifG3E8_iPl6sRCro3r1fPuFuMlgLoIexqRcRQfU-VxG6GB2cvbxJNnbvBhqwdODYoFkzl-nvRdV-TI8-E8E5CdTPPCL1U10I7wY4JlH-Ra6YuxtdH2vXeQdVAx444Q3BrzxgDeOeOPFEgPeOOF9F63nR6s3xyQMvSAamEJPlClkoyrKZUaVBbJaFRKsmZ4o2siMUSmnTAJx08aUNNeNKYuJYUpxYPpMMV7cQ6NNu7H3EW54o0FhA-PMmzLXVEk4TzdFw7JMsrI6RCRKQmx9bxMRk_6c5ISTnKjg4yQn6kM0ieISgZ953iUA8kuufBqlK0B9uZiU3Nj24qugwIDhjTZ7cOkZD9E138faub8eoVHfXdjHQAh79ST8I34Ae59dcQ
linkProvider Library Specific Holdings
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Array+processor+for+block+adaptive+LS+FIR+filtering&rft.jtitle=Signal+processing&rft.au=Nikolaidis%2C+S+S&rft.au=Theodoridis%2C+S&rft.au=Goutis%2C+C+E&rft.date=1994&rft.issn=0165-1684&rft.volume=39&rft.issue=1-2&rft.spage=215&rft.epage=222&rft_id=info:doi/10.1016%2F0165-1684%2894%2990135-X&rft.externalDBID=NO_FULL_TEXT
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0165-1684&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0165-1684&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0165-1684&client=summon