APA (7th ed.) Citation

Guo, X., Wang, H., & Devabhaktuni, V. (2012). A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm. ISRN Bioinformatics, 2012(2012), 1-11. https://doi.org/10.5402/2012/195658

Chicago Style (17th ed.) Citation

Guo, Xinyu, Hong Wang, and Vijay Devabhaktuni. "A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm." ISRN Bioinformatics 2012, no. 2012 (2012): 1-11. https://doi.org/10.5402/2012/195658.

MLA (9th ed.) Citation

Guo, Xinyu, et al. "A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm." ISRN Bioinformatics, vol. 2012, no. 2012, 2012, pp. 1-11, https://doi.org/10.5402/2012/195658.