Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits
A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search alg...
Saved in:
| Published in | Integration (Amsterdam) Vol. 62; pp. 159 - 169 |
|---|---|
| Main Authors | , , |
| Format | Journal Article |
| Language | English |
| Published |
Amsterdam
Elsevier B.V
01.06.2018
Elsevier BV |
| Subjects | |
| Online Access | Get full text |
| ISSN | 0167-9260 1872-7522 |
| DOI | 10.1016/j.vlsi.2018.02.010 |
Cover
| Abstract | A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search algorithm is applied on the nonfunctional paths to accurately locate defective elements. Experiments demonstrate that our algorithms accurately pinpoint 99.1% of single defects and 71% of multiple defects when eight defects were randomly injected. They were also successfully applied on a large area integrated circuit where multiple clusters of defects were located.
•A large area integrated circuit (LAIC) as a mesh-like network of cells and links.•The LAIC is configured using reconfigurable and defect tolerant JTAG scan chains.•Diagnosis algorithm of stuck-at faults in the scan chains are proposed. |
|---|---|
| AbstractList | A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search algorithm is applied on the nonfunctional paths to accurately locate defective elements. Experiments demonstrate that our algorithms accurately pinpoint 99.1% of single defects and 71% of multiple defects when eight defects were randomly injected. They were also successfully applied on a large area integrated circuit where multiple clusters of defects were located. A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search algorithm is applied on the nonfunctional paths to accurately locate defective elements. Experiments demonstrate that our algorithms accurately pinpoint 99.1% of single defects and 71% of multiple defects when eight defects were randomly injected. They were also successfully applied on a large area integrated circuit where multiple clusters of defects were located. •A large area integrated circuit (LAIC) as a mesh-like network of cells and links.•The LAIC is configured using reconfigurable and defect tolerant JTAG scan chains.•Diagnosis algorithm of stuck-at faults in the scan chains are proposed. |
| Author | Berrima, Safa Blaquière, Yves Savaria, Yvon |
| Author_xml | – sequence: 1 givenname: Safa surname: Berrima fullname: Berrima, Safa email: safa.berrima@polymtl.ca organization: Electrical Engineering Department, Polytechnique Montréal, C. P. 6079, Succ. Centre-ville, Montréal, Québec, H3C 3A7, Canada – sequence: 2 givenname: Yves surname: Blaquière fullname: Blaquière, Yves email: yves.blaquiere@etsmtl.ca organization: Electrical Engineering Department, École de technologie supérieure, 1100 Notre-Dame Ouest Street, Montréal, Québec, H3C 1K3, Canada – sequence: 3 givenname: Yvon surname: Savaria fullname: Savaria, Yvon email: yvon.savaria@polymtl.ca organization: Electrical Engineering Department, Polytechnique Montréal, C. P. 6079, Succ. Centre-ville, Montréal, Québec, H3C 3A7, Canada |
| BookMark | eNp9kE1LAzEQhoNUsK3-AU8Bz7sm2W2TBS_itwhe9Bxms5M1ZU00SQv-e1PqWRgYBp53ZngWZOaDR0LOOas54-vLTb2bkqsF46pmomacHZE5V1JUciXEjMwLJKtOrNkJWaS0YYzxVq7mJNw6GH1ILlGYxhBd_vhM1IZIgUY0wVs3biP0E1LwAx3Qosk0hwkj-Eyf364faDLgqfkA52mpCeJY4IhQpoxjhIwDNS6arcvplBxbmBKe_fUleb-_e7t5rF5eH55url8qI2SXK9saBj2CAmUFDGvZrBpYD63ouFWrBoW1HIRRFnrZcN6rFhnHvreiF13HVbMkF4e9XzF8bzFlvQnb6MtJLZhSsmvaRhZKHCgTQ0oRrf6K7hPij-ZM78Xqjd6L1XuxmgldxJbQ1SGE5f-dw6iTcegNDq4Yy3oI7r_4L6qQhPY |
| Cites_doi | 10.1109/92.555982 10.1002/net.3230070404 10.1109/TVLSI.2014.2313563 10.1109/TVLSI.2013.2294712 |
| ContentType | Journal Article |
| Copyright | 2018 Elsevier B.V. Copyright Elsevier BV Jun 2018 |
| Copyright_xml | – notice: 2018 Elsevier B.V. – notice: Copyright Elsevier BV Jun 2018 |
| DBID | AAYXX CITATION 7SP 8FD L7M |
| DOI | 10.1016/j.vlsi.2018.02.010 |
| DatabaseName | CrossRef Electronics & Communications Abstracts Technology Research Database Advanced Technologies Database with Aerospace |
| DatabaseTitle | CrossRef Technology Research Database Advanced Technologies Database with Aerospace Electronics & Communications Abstracts |
| DatabaseTitleList | Technology Research Database |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering |
| EISSN | 1872-7522 |
| EndPage | 169 |
| ExternalDocumentID | 10_1016_j_vlsi_2018_02_010 S0167926017306326 |
| GroupedDBID | --K --M -~X .DC .~1 0R~ 1B1 1~. 1~5 29J 4.4 457 4G. 5GY 5VS 7-5 71M 8P~ 9JN AACTN AAEDT AAEDW AAIAV AAIKJ AAKOC AALRI AAOAW AAQFI AAQXK AAXUO AAYFN ABBOA ABFNM ABJNI ABMAC ABXDB ABYKQ ACDAQ ACGFS ACNNM ACRLP ACZNC ADBBV ADEZE ADJOM ADMUD ADTZH AEBSH AECPX AEKER AFKWA AFTJW AGHFR AGUBO AGYEJ AHHHB AHJVU AHZHX AIALX AIEXJ AIKHN AITUG AJBFU AJOXV ALMA_UNASSIGNED_HOLDINGS AMFUW AMRAJ AOUOD ASPBG AVWKF AXJTR AZFZN BJAXD BKOJK BLXMC CS3 EBS EFJIC EFLBG EJD EO8 EO9 EP2 EP3 F0J F5P FDB FEDTE FGOYB FIRID FNPLU FYGXN G-2 G-Q G8K GBLVA GBOLZ HLZ HVGLF HZ~ IHE J1W JJJVA KOM LG9 LY7 M41 MO0 N9A O-L O9- OAUVE OZT P-8 P-9 P2P PC. Q38 R2- RIG ROL RPZ SBC SDF SDG SDP SES SET SEW SPC SPCBC SST SSV SSZ T5K UHS WUQ XPP ZMT ~G- AATTM AAXKI AAYWO AAYXX ABDPE ACLOT ACRPL ADNMO AEIPS AFJKZ AGQPQ AIIUN ANKPU APXCP CITATION EFKBS ~HD 7SP 8FD AFXIZ AGCQF AGRNS L7M SSH |
| ID | FETCH-LOGICAL-c279t-f4c0abea8a8f2ad67353a6d4291f853e2ff1a2c8fab7311b84e01ebbf2b299183 |
| IEDL.DBID | .~1 |
| ISSN | 0167-9260 |
| IngestDate | Fri Jul 25 08:28:10 EDT 2025 Thu Oct 02 04:39:05 EDT 2025 Fri Feb 23 02:46:52 EST 2024 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Keywords | Defect tolerance Diagnosis Large area integrated circuit (LAIC) Defect tolerant scan chain |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c279t-f4c0abea8a8f2ad67353a6d4291f853e2ff1a2c8fab7311b84e01ebbf2b299183 |
| Notes | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| PQID | 2088793437 |
| PQPubID | 2045472 |
| PageCount | 11 |
| ParticipantIDs | proquest_journals_2088793437 crossref_primary_10_1016_j_vlsi_2018_02_010 elsevier_sciencedirect_doi_10_1016_j_vlsi_2018_02_010 |
| PublicationCentury | 2000 |
| PublicationDate | June 2018 2018-06-00 20180601 |
| PublicationDateYYYYMMDD | 2018-06-01 |
| PublicationDate_xml | – month: 06 year: 2018 text: June 2018 |
| PublicationDecade | 2010 |
| PublicationPlace | Amsterdam |
| PublicationPlace_xml | – name: Amsterdam |
| PublicationTitle | Integration (Amsterdam) |
| PublicationYear | 2018 |
| Publisher | Elsevier B.V Elsevier BV |
| Publisher_xml | – name: Elsevier B.V – name: Elsevier BV |
| References | Koren, Koren (bib1) 1997 Brewer (bib5) 1989 S. M. Douskey, M. J. Hamilton, A. R. Kaufer, Partitioned scan chain diagnostics using multiple bypass structures and injection points, U. S Patent 9 529 046, December 7, 2016. Blaquiere, Basile-Bellavance, Berrima, Savaria (bib6) 2014 Wang, Wu, Wen (bib7) 2006 Lo, Hsieh, Lan, Lin, Hwang (bib19) 2014; 22 Fibonacci (bib26) 2003 Laflamme-Mayer, Blaquière, Savaria, Sawan (bib31) 2014 Edirisooriya, Edirisooriya (bib13) 1995 Norman (bib3) 2008 Kundu (bib9) 1993 (Accessed 23 October 2017). Basile-Bellavance, Blaquière, Savaria (bib24) 2009 André, Blaquière, Savaria (bib30) 2011 Langford, Liou, Raghavan (bib32) 2001 (bib25) 2014 L. Huisman. Segmented scan chains with dynamic reconfigurations, U. S Patent 7 139 950, November 21, 2006. D. Cohen, E. Koltin, M. L. Ayelet, A. Shacham, Stitching design rules for forming interconnect layers, U. S Patent 6 225 013, May 01, 2001. Schafer (bib10) 1992 Frank (bib27) 1974 Otterstedt, Kuboschek, Castagne, Mucha (bib2) 1996 Huang, Guo, Cheng, Li (bib8) 2008 Sion, Blaquière, Savaria (bib23) 2015 Narayanan, Das (bib11) 1997 S. M. Douskey, M. J. Hamilton, A. R. Kaufer, Implementing enhanced scan chain diagnostics via bypass multiplexing structure, U. S Patent 9 429 622, August 30, 2016. Angford, Liou (bib33) 1998 (bib21) 2013 Huang, Cheng, Hsieh, Tseng, Huang, Hung (bib22) 2004; vol. 2 Hadlock (bib28) 1977; 7 Huang, Cheng (bib20) 2017 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology, DS0025, Revision 27, Microsemi, Mai 2016. URL Ahlawat, Vaghani, Gulve, Singh (bib12) 2017 A. Rich, R. John, Scan chain fault diagnosis, U. S Patent 8 412 992, April 2, 2013. Ye (bib18) 2015; 23 Soukup (bib29) 1992 Berriah, Bougataya, Lakhssassi, Blaquière, Savaria (bib35) 2010 Otterstedt (10.1016/j.vlsi.2018.02.010_bib2) 1996 (10.1016/j.vlsi.2018.02.010_bib21) 2013 Laflamme-Mayer (10.1016/j.vlsi.2018.02.010_bib31) 2014 Ye (10.1016/j.vlsi.2018.02.010_bib18) 2015; 23 Hadlock (10.1016/j.vlsi.2018.02.010_bib28) 1977; 7 Koren (10.1016/j.vlsi.2018.02.010_bib1) 1997 10.1016/j.vlsi.2018.02.010_bib34 Soukup (10.1016/j.vlsi.2018.02.010_bib29) 1992 10.1016/j.vlsi.2018.02.010_bib15 Ahlawat (10.1016/j.vlsi.2018.02.010_bib12) 2017 10.1016/j.vlsi.2018.02.010_bib16 Huang (10.1016/j.vlsi.2018.02.010_bib8) 2008 Angford (10.1016/j.vlsi.2018.02.010_bib33) 1998 Berriah (10.1016/j.vlsi.2018.02.010_bib35) 2010 Narayanan (10.1016/j.vlsi.2018.02.010_bib11) 1997 10.1016/j.vlsi.2018.02.010_bib14 Kundu (10.1016/j.vlsi.2018.02.010_bib9) 1993 10.1016/j.vlsi.2018.02.010_bib17 Huang (10.1016/j.vlsi.2018.02.010_bib22) 2004; vol. 2 Schafer (10.1016/j.vlsi.2018.02.010_bib10) 1992 Blaquiere (10.1016/j.vlsi.2018.02.010_bib6) 2014 Frank (10.1016/j.vlsi.2018.02.010_bib27) 1974 Lo (10.1016/j.vlsi.2018.02.010_bib19) 2014; 22 Huang (10.1016/j.vlsi.2018.02.010_bib20) 2017 (10.1016/j.vlsi.2018.02.010_bib25) 2014 Langford (10.1016/j.vlsi.2018.02.010_bib32) 2001 Edirisooriya (10.1016/j.vlsi.2018.02.010_bib13) 1995 Norman (10.1016/j.vlsi.2018.02.010_bib3) 2008 Wang (10.1016/j.vlsi.2018.02.010_bib7) 2006 10.1016/j.vlsi.2018.02.010_bib4 Brewer (10.1016/j.vlsi.2018.02.010_bib5) 1989 Fibonacci (10.1016/j.vlsi.2018.02.010_bib26) 2003 Sion (10.1016/j.vlsi.2018.02.010_bib23) 2015 Basile-Bellavance (10.1016/j.vlsi.2018.02.010_bib24) 2009 André (10.1016/j.vlsi.2018.02.010_bib30) 2011 |
| References_xml | – start-page: 907 year: 1974 end-page: 9014 ident: bib27 article-title: The Lee path connection algorithm publication-title: IEEE Trans. Comput. – year: 2014 ident: bib25 publication-title: IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device – start-page: 382 year: 1992 end-page: 385 ident: bib29 article-title: Maze router without a grid map publication-title: IEEE/ACM International Conference on Computer-aided Design – start-page: 130 year: 1998 end-page: 133 ident: bib33 article-title: Negative binomial yield model parameter extraction using wafer probe bin map data publication-title: Proceedings on IEEE Electron Devices Meeting, Hong Kong – start-page: 1 year: 2013 end-page: 899 ident: bib21 publication-title: IEEE Standard for Test Access Port and Boundary-scan Architecture - Redline – start-page: 3 year: 1997 end-page: 14 ident: bib1 article-title: On the effect of floorplanning on the yield of large area integrated circuits publication-title: IEEE Trans. Very Large Scale Integr. Syst. – volume: 7 start-page: 323 year: 1977 end-page: 334 ident: bib28 article-title: A shortest path algorithm for grid graphs publication-title: Networks – reference: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology, DS0025, Revision 27, Microsemi, Mai 2016. URL: – start-page: 1 year: 2017 end-page: 4 ident: bib20 article-title: On designing two-dimensional scan architecture for test chips publication-title: IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) – start-page: 704 year: 1997 end-page: 713 ident: bib11 article-title: An efficient scheme to diagnose scan chains publication-title: International Test Conference – start-page: 207 year: 2011 end-page: 225 ident: bib30 article-title: A wafer-scale rapid electronic systems prototyping platform publication-title: Advanced Applications of Rapid Prototyping Technology in Modern Engineering – reference: D. Cohen, E. Koltin, M. L. Ayelet, A. Shacham, Stitching design rules for forming interconnect layers, U. S Patent 6 225 013, May 01, 2001. – start-page: 1 year: 2017 end-page: 4 ident: bib12 article-title: A low cost technique for scan chain diagnosis publication-title: IEEE International Symposium on Circuits and Systems (ISCAS) – start-page: 3135 year: 2014 end-page: 3144 ident: bib31 article-title: A configurable multi-rail power and I/O pad applied to wafer-scale systems publication-title: IEEE Transactions on Circuits and Systems I – volume: 23 start-page: 466 year: 2015 end-page: 479 ident: bib18 article-title: Diagnosis and Layout Aware (DLA) scan chain stitching publication-title: IEEE Trans. Very Large Scale Integr. Syst. – start-page: 240 year: 2008 end-page: 248 ident: bib8 article-title: Survey of scan chain diagnosis publication-title: IEEE Design & Test of Computers – start-page: 157 year: 2001 end-page: 160 ident: bib32 article-title: The application and validation of a new robust windowing method for the Poisson yield model publication-title: IEEE/SEMI Advanced Semiconductor Manufacturing Conference – start-page: 129 year: 2010 end-page: 132 ident: bib35 article-title: Thermal analysis of a miniature electronic power device matched to a silicon wafer publication-title: NEWCAS Conference – start-page: 198 year: 1992 end-page: 201 ident: bib10 article-title: Partner SRLs for improved shift register diagnostics publication-title: VLSI Test Symposium – reference: S. M. Douskey, M. J. Hamilton, A. R. Kaufer, Implementing enhanced scan chain diagnostics via bypass multiplexing structure, U. S Patent 9 429 622, August 30, 2016. – start-page: 113 year: 1996 end-page: 123 ident: bib2 article-title: A 16. 6 cm publication-title: IEEE International Conf. On Innovative Systems in Silicon – reference: A. Rich, R. John, Scan chain fault diagnosis, U. S Patent 8 412 992, April 2, 2013. – start-page: 2559 year: 2014 end-page: 2562 ident: bib6 article-title: Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain publication-title: IEEE International Symposium on Circuits and Systems (ISCAS) – year: 2006 ident: bib7 article-title: VLSI Test Principles and Architectures: Design for Testability – start-page: 1 year: 1989 end-page: 29 ident: bib5 article-title: Promise and pitfalls of WSI publication-title: Wafer Scale Integration – start-page: 1 year: 2009 end-page: 4 ident: bib24 article-title: Faults diagnosis methodology for the WaferNet interconnection network publication-title: IEEE Northeast Workshop on Circuits and Systems and TAISA Conference – start-page: 303 year: 1993 end-page: 308 ident: bib9 article-title: On diagnosis of faults in a scan-chain publication-title: VLSI Test Symposium – start-page: 250 year: 1995 end-page: 255 ident: bib13 article-title: Diagnosis of scan path failures publication-title: 31st IEEE VLSI Test Symposium (VTS) – start-page: 83 year: 2015 end-page: 88 ident: bib23 article-title: Defect diagnosis algorithms for a field programmable interconnect network embedded in a very large area integrated circuit publication-title: 21st IEEE International On-line Testing Symposium (IOLTS), Greece – year: 2003 ident: bib26 publication-title: Fibonacci's Liber Abaci: a Translation into Modern English of Leonardo Pisano's Book of Calculation – reference: L. Huisman. Segmented scan chains with dynamic reconfigurations, U. S Patent 7 139 950, November 21, 2006. – volume: vol. 2 start-page: 1072 year: 2004 end-page: 1077 ident: bib22 article-title: Intermittent scan chain fault diagnosis based on signal probability analysis publication-title: Proceedings of Design, Automation and Test in Europe Conference and Exhibition – volume: 22 start-page: 2766 year: 2014 end-page: 2778 ident: bib19 article-title: Utilizing circuit structure for scan chain diagnosis publication-title: IEEE Trans. Very Large Scale Integr. Syst. – start-page: 351 year: 2008 end-page: 354 ident: bib3 article-title: An active reconfigurable circuit board publication-title: 6th International IEEE Northeast Workshop on Circuits & Systems and TAISA Conf – reference: S. M. Douskey, M. J. Hamilton, A. R. Kaufer, Partitioned scan chain diagnostics using multiple bypass structures and injection points, U. S Patent 9 529 046, December 7, 2016. – reference: (Accessed 23 October 2017). – ident: 10.1016/j.vlsi.2018.02.010_bib34 – volume: vol. 2 start-page: 1072 year: 2004 ident: 10.1016/j.vlsi.2018.02.010_bib22 article-title: Intermittent scan chain fault diagnosis based on signal probability analysis – start-page: 130 year: 1998 ident: 10.1016/j.vlsi.2018.02.010_bib33 article-title: Negative binomial yield model parameter extraction using wafer probe bin map data – year: 2006 ident: 10.1016/j.vlsi.2018.02.010_bib7 – start-page: 157 year: 2001 ident: 10.1016/j.vlsi.2018.02.010_bib32 article-title: The application and validation of a new robust windowing method for the Poisson yield model – ident: 10.1016/j.vlsi.2018.02.010_bib15 – start-page: 250 year: 1995 ident: 10.1016/j.vlsi.2018.02.010_bib13 article-title: Diagnosis of scan path failures – ident: 10.1016/j.vlsi.2018.02.010_bib17 – start-page: 240 year: 2008 ident: 10.1016/j.vlsi.2018.02.010_bib8 article-title: Survey of scan chain diagnosis – start-page: 207 year: 2011 ident: 10.1016/j.vlsi.2018.02.010_bib30 article-title: A wafer-scale rapid electronic systems prototyping platform – year: 2014 ident: 10.1016/j.vlsi.2018.02.010_bib25 – year: 2003 ident: 10.1016/j.vlsi.2018.02.010_bib26 – start-page: 113 year: 1996 ident: 10.1016/j.vlsi.2018.02.010_bib2 article-title: A 16. 6 cm2 large area integrated circuit consisting of 9 video signal processors – start-page: 3 year: 1997 ident: 10.1016/j.vlsi.2018.02.010_bib1 article-title: On the effect of floorplanning on the yield of large area integrated circuits publication-title: IEEE Trans. Very Large Scale Integr. Syst. doi: 10.1109/92.555982 – start-page: 382 year: 1992 ident: 10.1016/j.vlsi.2018.02.010_bib29 article-title: Maze router without a grid map – start-page: 129 year: 2010 ident: 10.1016/j.vlsi.2018.02.010_bib35 article-title: Thermal analysis of a miniature electronic power device matched to a silicon wafer – start-page: 907 year: 1974 ident: 10.1016/j.vlsi.2018.02.010_bib27 article-title: The Lee path connection algorithm publication-title: IEEE Trans. Comput. – start-page: 704 year: 1997 ident: 10.1016/j.vlsi.2018.02.010_bib11 article-title: An efficient scheme to diagnose scan chains – start-page: 1 year: 2013 ident: 10.1016/j.vlsi.2018.02.010_bib21 – start-page: 351 year: 2008 ident: 10.1016/j.vlsi.2018.02.010_bib3 article-title: An active reconfigurable circuit board – start-page: 1 year: 2017 ident: 10.1016/j.vlsi.2018.02.010_bib20 article-title: On designing two-dimensional scan architecture for test chips – volume: 7 start-page: 323 issue: 4 year: 1977 ident: 10.1016/j.vlsi.2018.02.010_bib28 article-title: A shortest path algorithm for grid graphs publication-title: Networks doi: 10.1002/net.3230070404 – volume: 23 start-page: 466 year: 2015 ident: 10.1016/j.vlsi.2018.02.010_bib18 article-title: Diagnosis and Layout Aware (DLA) scan chain stitching publication-title: IEEE Trans. Very Large Scale Integr. Syst. doi: 10.1109/TVLSI.2014.2313563 – start-page: 83 year: 2015 ident: 10.1016/j.vlsi.2018.02.010_bib23 article-title: Defect diagnosis algorithms for a field programmable interconnect network embedded in a very large area integrated circuit – volume: 22 start-page: 2766 year: 2014 ident: 10.1016/j.vlsi.2018.02.010_bib19 article-title: Utilizing circuit structure for scan chain diagnosis publication-title: IEEE Trans. Very Large Scale Integr. Syst. doi: 10.1109/TVLSI.2013.2294712 – start-page: 198 year: 1992 ident: 10.1016/j.vlsi.2018.02.010_bib10 article-title: Partner SRLs for improved shift register diagnostics – ident: 10.1016/j.vlsi.2018.02.010_bib16 – start-page: 1 year: 1989 ident: 10.1016/j.vlsi.2018.02.010_bib5 article-title: Promise and pitfalls of WSI – start-page: 303 year: 1993 ident: 10.1016/j.vlsi.2018.02.010_bib9 article-title: On diagnosis of faults in a scan-chain – ident: 10.1016/j.vlsi.2018.02.010_bib4 – ident: 10.1016/j.vlsi.2018.02.010_bib14 – start-page: 3135 year: 2014 ident: 10.1016/j.vlsi.2018.02.010_bib31 article-title: A configurable multi-rail power and I/O pad applied to wafer-scale systems – start-page: 2559 year: 2014 ident: 10.1016/j.vlsi.2018.02.010_bib6 article-title: Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain – start-page: 1 year: 2017 ident: 10.1016/j.vlsi.2018.02.010_bib12 article-title: A low cost technique for scan chain diagnosis – start-page: 1 year: 2009 ident: 10.1016/j.vlsi.2018.02.010_bib24 article-title: Faults diagnosis methodology for the WaferNet interconnection network |
| SSID | ssj0001475 |
| Score | 2.1065683 |
| Snippet | A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a... |
| SourceID | proquest crossref elsevier |
| SourceType | Aggregation Database Index Database Publisher |
| StartPage | 159 |
| SubjectTerms | Algorithms Chains Defect tolerance Defect tolerant scan chain Defects Diagnosis Integrated circuits Large area integrated circuit (LAIC) Reconfiguration Search algorithms |
| Title | Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits |
| URI | https://dx.doi.org/10.1016/j.vlsi.2018.02.010 https://www.proquest.com/docview/2088793437 |
| Volume | 62 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVESC databaseName: Baden-Württemberg Complete Freedom Collection (Elsevier) customDbUrl: eissn: 1872-7522 dateEnd: 99991231 omitProxy: true ssIdentifier: ssj0001475 issn: 0167-9260 databaseCode: GBLVA dateStart: 20110101 isFulltext: true titleUrlDefault: https://www.sciencedirect.com providerName: Elsevier – providerCode: PRVESC databaseName: Elsevier SD Complete Freedom Collection [SCCMFC] customDbUrl: eissn: 1872-7522 dateEnd: 99991231 omitProxy: true ssIdentifier: ssj0001475 issn: 0167-9260 databaseCode: ACRLP dateStart: 19950601 isFulltext: true titleUrlDefault: https://www.sciencedirect.com providerName: Elsevier – providerCode: PRVESC databaseName: ScienceDirect (Elsevier) customDbUrl: eissn: 1872-7522 dateEnd: 99991231 omitProxy: true ssIdentifier: ssj0001475 issn: 0167-9260 databaseCode: .~1 dateStart: 0 isFulltext: true titleUrlDefault: https://www.sciencedirect.com providerName: Elsevier – providerCode: PRVESC databaseName: ScienceDirect Freedom Collection Journals customDbUrl: eissn: 1872-7522 dateEnd: 99991231 omitProxy: true ssIdentifier: ssj0001475 issn: 0167-9260 databaseCode: AIKHN dateStart: 19950601 isFulltext: true titleUrlDefault: https://www.sciencedirect.com providerName: Elsevier |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV1Ja9tAFB6Ce2kPJd2omzTMobeiWsvIGh2Nm8R121DaGHwb3myOiiMFS84xvz3vaelG6aEgENoG8c3M-97A971h7A3ZL5F1ZJAZZwIhLU4p6X1grQaLfOrDiIzCny-mi5VYrtP1AZsPXhiSVfaxv4vpbbTu70x6NCc3RTH5RgL6nCpi4SCdYhZCDnaR0S4G7-5-yjwikaVDfW96uzfOdBqv221dkLxLtnU7yUX7d3L6I0y33HN2yB73SSOfdf_1hB248il79EspwWeset9p5oqaw3ZT4ZL_6rrmmJFy4O2i1xeb_Y58UhxKy60jGQdvqq1Dsmr48nJ2zmuEmZsrKEqOx5Y04hwwqeQ_akpYboqd2RdN_Zytzk4v54ug30whMHGWN4EXJgTtQIL0MdhplqQJTC3SUeSRsl3sfQSxkR50lkSRlsJhN2ntY42MhRP_BRuVVeleMh7r1AEZcEEaYUwEADq0NkcgfQIgxuztgKK66WpmqEFM9l0R5oowV2GsEPMxSweg1W89rzCo__O746FXVD_vanyOQTNPRJK9-s9mj9hDuurUYMds1Oz27jXmHY0-aQfWCXswm3_99IXOHz4uLu4B4Z7bLw |
| linkProvider | Elsevier |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV3JTsMwELUKHIADYhVLAR-4odAmcRr3iMpSynKhSNys8QZBJUVNypFvZ5yFTYgDUk5xEkXPnnlj6b0xIQfOfomsw71YGeUxrjGkuLWe1hI08qlt-84ofH3T6d-xwX103yC92gvjZJVV7i9zepGtqzutCs3WS5K0bp2Avus6YuEi7WAVMkPmWBTEbgd29Pap8_BZHNUNvt3jlXOmFHm9jrLE6bt40bjT2Wh_Z6cfebogn7NlslRVjfS4_LEV0jDpKln80ktwjYxPStFcklEYPYxxz__4nFEsSSnQYtdrk4fpxBmlKKSaauN0HDQfjwyyVU4Hw-NzmiHOVD1CklK8Rk4kTgGrSvrRVEJTlUzUNMmzdXJ3djrs9b3qNAVPBXE39yxTbZAGOHAbgO7EYRRCRyMf-RY52wTW-hAobkHGoe9LzgzOk5Q2kEhZGPkbZDYdp2aT0EBGBpwDF7hiSvkAINtadxFIGwKwLXJYoyheyqYZolaTPQmHuXCYi3YgEPMtEtVAi29TLzCr__les54VUQVehuOYNbshC-Ptf352n8z3h9dX4uri5nKHLLiRUhrWJLP5ZGp2sQjJ5V6xyN4BOSLbLw |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Diagnosis+algorithms+for+a+reconfigurable+and+defect+tolerant+JTAG+scan+chain+in+large+area+integrated+circuits&rft.jtitle=Integration+%28Amsterdam%29&rft.au=Berrima%2C+Safa&rft.au=Blaqui%C3%A8re%2C+Yves&rft.au=Savaria%2C+Yvon&rft.date=2018-06-01&rft.pub=Elsevier+BV&rft.issn=0167-9260&rft.eissn=1872-7522&rft.volume=62&rft.spage=159&rft_id=info:doi/10.1016%2Fj.vlsi.2018.02.010&rft.externalDBID=NO_FULL_TEXT |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0167-9260&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0167-9260&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0167-9260&client=summon |