LMS-Based Background Calibration of Bit Weights in SAR ADC Using Reinforcement Learning Optimization

• Published in: Circuits, systems, and signal processing Vol. 43; no. 3; pp. 1741 - 1754
• Main Authors: Song, Xinyan, Meng, Qiao, Huang, Yujia, Zong, Chenchen, Meng, Yishuo
• Format: Journal Article
• Language: English
• Published: New York Springer US 01.03.2024; Springer Nature B.V
• Subjects: Algorithms; Analog to digital converters; Calibration; Capacitors; Circuits and Systems; Convergence; Electrical Engineering; Electronics and Microelectronics; Engineering; Instrumentation; Machine learning; Optimization; Signal,Image and Speech Processing; Stability; LMS-based background calibration; Q-learning; Capacitor mismatch; Iteration step size selection strategy; Reinforcement learning; SAR ADC
• ISSN: 0278-081X; 1531-5878
• DOI: 10.1007/s00034-023-02536-7

This paper presents a least-mean-square-based (LMS-based) background calibration algorithm with reinforcement learning optimization to calibrate the capacitor mismatch in successive approximation-register (SAR) analog-to-digital converters (ADCs). When calibrating capacitor mismatch, the convergence speed and stability of the conventional LMS-based algorithm cannot be balanced due to the fixed iteration step size. To improve the calibration effect, nine different iteration step sizes are proposed for calibration. An iteration step size selection strategy is obtained by training the Q-learning algorithm with the conventional LMS-based calibration iteration process. Leading by this strategy, the proposed calibration algorithm performs better convergence speed and stability than the conventional LMS-based calibration algorithm. A 12-bit sub-radix-2 redundant SAR ADC is used to test our proposed calibration algorithm for better evaluation. Behavioral simulations show that the proposed calibration algorithm converges at 0.065 M sampling points, and the standard deviation of the effective number of bits (ENOB) in the convergence state is only 0.034-bit.