VLSI implementation of an energy-efficient color image compressor using improved block truncation coding and enhanced Golomb-rice coding for wireless sensor networks

• Published in: The Journal of supercomputing Vol. 80; no. 17; pp. 24807 - 24834
• Main Authors: Nirmala, R., Begum, S. Ariffa, Selvanayagi, A., Ramya, P.
• Format: Journal Article
• Language: English
• Published: New York Springer US 01.11.2024; Springer Nature B.V
• Subjects: Algorithms; Coding; Color imagery; Compilers; Compression ratio; Computer Science; Energy consumption; Energy efficiency; Fourier transforms; Gate counting; Hardware; Image compression; Image reconstruction; Integrated circuits; Interpreters; Large scale integration; Measurement; Modules; Pixels; Processor Architectures; Programming Languages; Real time; Resource utilization; Sampling; Sensors; Transistors; Very large scale integration; Wavelet transforms; Wireless sensor networks; Block truncation coding; Hardware utilization; WSN; Compression ratio; VLSI; Image compressor; Enhanced Golomb-rice coding; Energy efficiency; Fuzzy
• ISSN: 0920-8542; 1573-0484
• DOI: 10.1007/s11227-024-06311-6

The very large-scale integration implementation of a unique hardware-oriented image compression technique for wireless sensor networks (WSNs) is presented in this work. Networks of individually owned sensors spread out throughout an area that can detect, measure, and report changes in environmental variables are known as wireless sensor networks (WSNs). Color sampling, block truncation coding (BTC), threshold optimization, sub-sampling, estimation, quantization, and enhanced Golomb-rice coding (EGRC) are all included in the proposed design. A unique improved BTC with an enhanced Golomb-rice coding (IBTC-EGRC) framework has been proposed in this paper. IBTC training framework has been developed using the fuzzy decision-based approach to achieve representative levels and satisfy WSN requirements to accomplish the cost-effective and power-efficient features. Two ideal reconstruction values and bitmap files have been obtained for every block. IBTC divides images into variable block sizes for mathematical translation and inter-pixel redundancy removal. The subsampling, estimation, and quantization stages have minimized redundant data. Finally, EGRC has been used to code the value with the highest likelihood. An EGRC module decreases memory use and computation complexity. The EGRC technique reduces hardware resource utilization by removing the need for the context module, a crucial part of lossless image compressor designs and its memory. Proposed method, Golomb-rice parameter forecasting and managment module is used to preserve pixel connection and improved compression ratio. A UMC 180 nm CMOS technology has been used to implement the suggested framework. This design has 5.8k synthesized gate counts and a core area of 56,000 µm 2 . 100 MHz and 3.01 mW were the operational frequency and energy consumption, respectively. The proposed method has a 9.37% reduction in gate count compared to the previous fuzzy BTC-based approach.