Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems - Li, Xin; Pan, Ying; Jin, Qian; Chen, Lintao; Lou, Yang; Wu, Baofa; Long, Jiajun; Zhou, Yongliang; Peng, Chunyu; Wu, Xiulong; Lin, Zhiting (IEEE transactions on very large scale integration (VLSI) systems, 2025)
Keywords: Arrays; Boolean; Common Information Model (computing); Computation; Computer architecture; Data processing; Encryption; Energy consumption; Full-array activation; in-memory logical operation; Logic arrays; Memory management; Microprocessors; Power demand; Random access memory; self-recycling technology; Static random access memory; static random-access memory (SRAM); Throughput; Transistors; von Neumann architecture; Writing