H∞ Anti-Disturbance Bumpless Transfer Control for Switched Affine Systems With Its Application to a Circuit Model

This brief concentrates on the problem of <inline-formula> <tex-math notation="LaTeX">H_{\infty } </tex-math></inline-formula> anti-disturbance bumpless transfer control (ADBTC) of switched affine systems (SASs) with multiple types of disturbances. The <inline-fo...

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Published inIEEE transactions on circuits and systems. II, Express briefs Vol. 72; no. 1; pp. 238 - 242
Main Authors Xie, Jing, Su, Han, Yang, Dong, Niu, Ben
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2025
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN1549-7747
1558-3791
DOI10.1109/TCSII.2024.3505153

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Summary:This brief concentrates on the problem of <inline-formula> <tex-math notation="LaTeX">H_{\infty } </tex-math></inline-formula> anti-disturbance bumpless transfer control (ADBTC) of switched affine systems (SASs) with multiple types of disturbances. The <inline-formula> <tex-math notation="LaTeX">H_{\infty } </tex-math></inline-formula> ADBTC strategy is put forward to achieve the bumpless transfer (BT) performance and the anti-disturbance performance, simultaneously. First, a more general switched affine disturbance observer is designed to estimate the external disturbances generated from the external SASs. Secondly, a novel BT performance constraint containing the system state, the disturbance observer state, and the affine terms is proposed to suppress the control bumps. Thirdly, a switched anti-disturbance BT controller and a state-dependent switching law are constructed. Then a solvable condition for the <inline-formula> <tex-math notation="LaTeX">H_{\infty } </tex-math></inline-formula> ADBTC problem of SASs is derived. Finally, the proposed control scheme is validated by an example of a circuit model.
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ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2024.3505153