A congestion-aware routing algorithm for mesh-based platform networks-on-chip
In this paper we propose a new congestion-aware routing algorithm. At the First step, this algorithm splits NoC into a number of subnets. Then a global routing algorithm within each subnet and a local routing algorithm between subnets are applied for routing. This issue combines the advantages of lo...
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| Published in | Microelectronics Vol. 114; p. 105145 |
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| Main Authors | , , , |
| Format | Journal Article |
| Language | English |
| Published |
Elsevier Ltd
01.08.2021
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| Subjects | |
| Online Access | Get full text |
| ISSN | 1879-2391 |
| DOI | 10.1016/j.mejo.2021.105145 |
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| Abstract | In this paper we propose a new congestion-aware routing algorithm. At the First step, this algorithm splits NoC into a number of subnets. Then a global routing algorithm within each subnet and a local routing algorithm between subnets are applied for routing. This issue combines the advantages of local and global algorithms together. This algorithm reduces the average latency of the packets in the system without increasing the power of the system. In the experiment that was conducted under uniform, transpose, and bit-reversal traffics, we found that this algorithm would go into the saturation state later than DyAD, CATRA and ERCA algorithms. In all other three algorithms and also, at all injection rates, our proposed algorithm has reduced the delayed average of 41.1% compared to DyAD, 17.2% compared to CATRA and 9.9% compared to ERCA. In addition, under the SPLASH 2 traffic, we found that package latency has improved by 24%, 17%, and 7% compared to the three DyAD, CATRA and ERCA algorithms respectively. |
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| AbstractList | In this paper we propose a new congestion-aware routing algorithm. At the First step, this algorithm splits NoC into a number of subnets. Then a global routing algorithm within each subnet and a local routing algorithm between subnets are applied for routing. This issue combines the advantages of local and global algorithms together. This algorithm reduces the average latency of the packets in the system without increasing the power of the system. In the experiment that was conducted under uniform, transpose, and bit-reversal traffics, we found that this algorithm would go into the saturation state later than DyAD, CATRA and ERCA algorithms. In all other three algorithms and also, at all injection rates, our proposed algorithm has reduced the delayed average of 41.1% compared to DyAD, 17.2% compared to CATRA and 9.9% compared to ERCA. In addition, under the SPLASH 2 traffic, we found that package latency has improved by 24%, 17%, and 7% compared to the three DyAD, CATRA and ERCA algorithms respectively. |
| ArticleNumber | 105145 |
| Author | Akbar, R. Taherkhani, N. Moudi, M. Safaei, F. |
| Author_xml | – sequence: 1 givenname: N. surname: Taherkhani fullname: Taherkhani, N. email: n_taherkhani@qiau.ac.ir organization: Faculty of Computer and Information Technology Engineering, Qazvin Branch, Islamic Azad University, Qazvin, Iran – sequence: 2 givenname: R. surname: Akbar fullname: Akbar, R. email: r_akbar@sbu.ac.ir organization: Faculty of Computer Science and Engineering, Shahid Beheshti University, Tehran, Iran – sequence: 3 givenname: F. surname: Safaei fullname: Safaei, F. email: f_safaei@sbu.ac.ir organization: Faculty of Computer Science and Engineering, Shahid Beheshti University, Tehran, Iran – sequence: 4 givenname: M. surname: Moudi fullname: Moudi, M. email: mmoudi@torbath.ac.ir organization: Department of Computer Engineering, University of Torbat Heydarieh, Razavi Khorasan Province, Iran |
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| Keywords | Congestion information Congestion control management Load balancing Network-on-chip (NoC) Adaptive routing algorithms |
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| SubjectTerms | Adaptive routing algorithms Congestion control management Congestion information Load balancing Network-on-chip (NoC) |
| Title | A congestion-aware routing algorithm for mesh-based platform networks-on-chip |
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