Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolat...

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Published inChinese physics B Vol. 25; no. 8; pp. 352 - 356
Main Author 徐昊 杨红 王艳蓉 王文武 罗维春 祁路伟 李俊峰 赵超 陈大鹏 叶甜春
Format Journal Article
LanguageEnglish
Published 01.08.2016
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ISSN1674-1056
2058-3834
1741-4199
DOI10.1088/1674-1056/25/8/087306

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Abstract High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up,and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation.It is found that all degradation factors,such as trap generation rate time exponent m,Weibull slope β and percolation factor s,each could be expressed as a function of trap density time exponent α.Based on the percolation relation and power law lifetime projection,a temperature related trap generation model is proposed.The validity of this model is confirmed by comparing with experiment results.For other device and material conditions,the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.
AbstractList High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes. The reliability of thin dielectric films becomes a limitation to device manufacturing, especially to the breakdown characteristic. In this work, a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up, and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation. It is found that all degradation factors, such as trap generation rate time exponent m, Weibull slope beta and percolation factor s, each could be expressed as a function of trap density time exponent alpha . Based on the percolation relation and power law lifetime projection, a temperature related trap generation model is proposed. The validity of this model is confirmed by comparing with experiment results. For other device and material conditions, the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.
High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up,and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation.It is found that all degradation factors,such as trap generation rate time exponent m,Weibull slope β and percolation factor s,each could be expressed as a function of trap density time exponent α.Based on the percolation relation and power law lifetime projection,a temperature related trap generation model is proposed.The validity of this model is confirmed by comparing with experiment results.For other device and material conditions,the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.
Author 徐昊 杨红 王艳蓉 王文武 罗维春 祁路伟 李俊峰 赵超 陈大鹏 叶甜春
AuthorAffiliation Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China
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Notes Hao Xu, Hong Yang, Yan-Rong Wang, Wen-Wu Wang, Wei-Chun Luo, Lu-Wei Qi, Jun-Feng Li, Chao Zhao, Da-Peng Chen, Tian-Chun Ye( Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics Chinese Academy of Sciences, Beijing 100029, China)
high-k metal gate, TDDB, percolation theory, kinetic Monte Carlo, trap generation model
11-5639/O4
High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up,and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation.It is found that all degradation factors,such as trap generation rate time exponent m,Weibull slope β and percolation factor s,each could be expressed as a function of trap density time exponent α.Based on the percolation relation and power law lifetime projection,a temperature related trap generation model is proposed.The validity of this model is confirmed by comparing with experiment results.For other device and material conditions,the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.
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Snippet High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films...
High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes. The reliability of thin dielectric films...
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StartPage 352
SubjectTerms Breakdown
Computer simulation
Devices
Exponents
Gates
Mathematical models
MOS器件
Percolation
Projection
故障模拟器
模拟温度
渗流模型
生成模型
电压依赖性
金属栅
陷阱密度
Title Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation
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