A Highly Stable Physically Unclonable Function Using Algorithm-Based Mismatch Hardening Technique in 28-nm CMOS

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 70; no. 1; pp. 280 - 289
• Main Authors: Yang, Shao-Hong, Liu, Tsung-Te
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithms; Bit error rate; CMOS; Entropy; Error correction codes; Hardening; hardware security; Internet of Things; Internet of Things (IoT); key storage; Physical unclonable function; Physically unclonable function (PUF); process variation; Reliability; Security; Stability analysis; Stabilization; weak puf
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2022.3217992

Physically unclonable function (PUF) is an emerging security solution for Internet of Things (IoT) devices. However, PUF faces a critical design challenge: responses should remain the same regardless of environmental conditions. This article presents an algorithm-based mismatch hardening technique that provides an effective and efficient solution to stabilizing PUF responses, which could be applied to various PUF circuits. The proposed stabilization technique combines multiple mismatches to achieve high reliability with minimum loss of utility. Moreover, the proposed approach requires only the available digitized PUF responses, avoiding any auxiliary measurement circuit to minimize additional implementation and testing overhead. The PUF test chip implemented in 28-nm CMOS technology shows that the proposed stabilization technique achieves a highly stable performance, lowering the nominal bit error rate (BER) to 0.0016%. It also exhibits excellent reliability with a worst-case BER of 0.16% across 0.7 to 1.2 V and −50 to 125°C, proving to be a promising candidate for security primitive for IoT applications.