A Resource-Optimized VLSI Implementation of a Patient-Specific Seizure Detection Algorithm on a Custom-Made 2.2 cm ^2 Wireless Device for Ambulatory Epilepsy Diagnostics
A patient-specific epilepsy diagnostic solution in the form of a wireless wearable ambulatory device is presented. First, the design, VLSI implementation, and experimental validation of a resource-optimized machine learning algorithm for epilepsy seizure detection are described. Next, the developmen...
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| Published in | IEEE transactions on biomedical circuits and systems Vol. 13; no. 6; pp. 1175 - 1185 |
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| Main Authors | , , , |
| Format | Journal Article |
| Language | English |
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United States
IEEE
01.12.2019
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| Subjects | |
| Online Access | Get full text |
| ISSN | 1932-4545 1940-9990 1940-9990 |
| DOI | 10.1109/TBCAS.2019.2948301 |
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| Abstract | A patient-specific epilepsy diagnostic solution in the form of a wireless wearable ambulatory device is presented. First, the design, VLSI implementation, and experimental validation of a resource-optimized machine learning algorithm for epilepsy seizure detection are described. Next, the development of a mini-PCB that integrates a low-power wireless data transceiver and a programmable processor for hosting the seizure detection algorithm is discussed. The algorithm uses only EEG signals from the frontal lobe electrodes while yielding a seizure detection sensitivity and specificity competitive to the standard full EEG systems. The experimental validation of the algorithm VLSI implementation proves the possibility of conducting accurate seizure detection using quickly-mountable dry-electrode headsets without the need for uncomfortable/painful through-hair electrodes or adhesive gels. Details of design and optimization of the algorithm, the VLSI implementation, and the mini-PCB development are presented and resource optimization techniques are discussed. The optimized implementation is uploaded on a low-power Microsemi Igloo FPGA, requires 1237 logic elements, consumes 110 μW dynamic power, and yields a minimum detection latency of 10.2 μs. The measurement results from the FPGA implementation on data from 23 patients (198 seizures in total) shows a seizure detection sensitivity and specificity of 92.5% and 80.1%, respectively. Comparison to the state of the art is presented from system integration, the VLSI implementation, and the wireless communication perspectives. |
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| AbstractList | A patient-specific epilepsy diagnostic solution in the form of a wireless wearable ambulatory device is presented. First, the design, VLSI implementation, and experimental validation of a resource-optimized machine learning algorithm for epilepsy seizure detection are described. Next, the development of a mini-PCB that integrates a low-power wireless data transceiver and a programmable processor for hosting the seizure detection algorithm is discussed. The algorithm uses only EEG signals from the frontal lobe electrodes while yielding a seizure detection sensitivity and specificity competitive to the standard full EEG systems. The experimental validation of the algorithm VLSI implementation proves the possibility of conducting accurate seizure detection using quickly-mountable dry-electrode headsets without the need for uncomfortable/painful through-hair electrodes or adhesive gels. Details of design and optimization of the algorithm, the VLSI implementation, and the mini-PCB development are presented and resource optimization techniques are discussed. The optimized implementation is uploaded on a low-power Microsemi Igloo FPGA, requires 1237 logic elements, consumes 110 μW dynamic power, and yields a minimum detection latency of 10.2 μs. The measurement results from the FPGA implementation on data from 23 patients (198 seizures in total) shows a seizure detection sensitivity and specificity of 92.5% and 80.1%, respectively. Comparison to the state of the art is presented from system integration, the VLSI implementation, and the wireless communication perspectives.A patient-specific epilepsy diagnostic solution in the form of a wireless wearable ambulatory device is presented. First, the design, VLSI implementation, and experimental validation of a resource-optimized machine learning algorithm for epilepsy seizure detection are described. Next, the development of a mini-PCB that integrates a low-power wireless data transceiver and a programmable processor for hosting the seizure detection algorithm is discussed. The algorithm uses only EEG signals from the frontal lobe electrodes while yielding a seizure detection sensitivity and specificity competitive to the standard full EEG systems. The experimental validation of the algorithm VLSI implementation proves the possibility of conducting accurate seizure detection using quickly-mountable dry-electrode headsets without the need for uncomfortable/painful through-hair electrodes or adhesive gels. Details of design and optimization of the algorithm, the VLSI implementation, and the mini-PCB development are presented and resource optimization techniques are discussed. The optimized implementation is uploaded on a low-power Microsemi Igloo FPGA, requires 1237 logic elements, consumes 110 μW dynamic power, and yields a minimum detection latency of 10.2 μs. The measurement results from the FPGA implementation on data from 23 patients (198 seizures in total) shows a seizure detection sensitivity and specificity of 92.5% and 80.1%, respectively. Comparison to the state of the art is presented from system integration, the VLSI implementation, and the wireless communication perspectives. A patient-specific epilepsy diagnostic solution in the form of a wireless wearable ambulatory device is presented. First, the design, VLSI implementation, and experimental validation of a resource-optimized machine learning algorithm for epilepsy seizure detection are described. Next, the development of a mini-PCB that integrates a low-power wireless data transceiver and a programmable processor for hosting the seizure detection algorithm is discussed. The algorithm uses only EEG signals from the frontal lobe electrodes while yielding a seizure detection sensitivity and specificity competitive to the standard full EEG systems. The experimental validation of the algorithm VLSI implementation proves the possibility of conducting accurate seizure detection using quickly-mountable dry-electrode headsets without the need for uncomfortable/painful through-hair electrodes or adhesive gels. Details of design and optimization of the algorithm, the VLSI implementation, and the mini-PCB development are presented and resource optimization techniques are discussed. The optimized implementation is uploaded on a low-power Microsemi Igloo FPGA, requires 1237 logic elements, consumes 110 μW dynamic power, and yields a minimum detection latency of 10.2 μs. The measurement results from the FPGA implementation on data from 23 patients (198 seizures in total) shows a seizure detection sensitivity and specificity of 92.5% and 80.1%, respectively. Comparison to the state of the art is presented from system integration, the VLSI implementation, and the wireless communication perspectives. |
| Author | Zhan, Tianyu Fatmi, Syyeda Zainab Guraya, Sam Kassiri, Hossein |
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| SubjectTerms | Algorithms Biomedical monitoring Electrodes Electroencephalography Electroencephalography - instrumentation Electroencephalography - methods Energy-efficient VLSI implementation Epilepsy Epilepsy - diagnosis Humans machine learning Monitoring patient specific point-of-care diagnostics Point-of-Care Systems seizure detection Seizures - diagnosis Support Vector Machine SVM Very large scale integration wearable devices Wearable Electronic Devices Wireless communication Wireless Technology wireless wearable sensors |
| Title | A Resource-Optimized VLSI Implementation of a Patient-Specific Seizure Detection Algorithm on a Custom-Made 2.2 cm ^2 Wireless Device for Ambulatory Epilepsy Diagnostics |
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