A PARALLEL AND PIPELINED ARCHITECTURE FOR CORDIC ALGORITHM
The COordinate Rotation DIgital Computer (CORDIC) algorithm is an efficient algorithm to calculate the iteratively phase and magnitude or the vector rotations in linear, hyperbolic and circular coordinate system. The existing CORDIC method takes less clock frequency with high delay. To overcome this...
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| Published in | International journal of advances in signal and image sciences Vol. 5; no. 2; pp. 23 - 31 |
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| Main Authors | , |
| Format | Journal Article |
| Language | English |
| Published |
XLESCIENCE
31.12.2019
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| Subjects | |
| Online Access | Get full text |
| ISSN | 2457-0370 2457-0370 |
| DOI | 10.29284/IJASIS.5.2.2019.23-31 |
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| Abstract | The COordinate Rotation DIgital Computer (CORDIC) algorithm is an efficient algorithm to calculate the iteratively phase and magnitude or the vector rotations in linear, hyperbolic and circular coordinate system. The existing CORDIC method takes less clock frequency with high delay. To overcome this problem, a new version of updated parallel and pipelined architecture is designed without degrading the performance. It provides highest maximum frequency with less delay by splitting the critical path into several smaller delay paths with enhanced circuit processing time. The designed architecture in this study can be used in navigation application. This method is implemented in the Xilinx ISE tool. |
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| AbstractList | The COordinate Rotation DIgital Computer (CORDIC) algorithm is an efficient algorithm to calculate the iteratively phase and magnitude or the vector rotations in linear, hyperbolic and circular coordinate system. The existing CORDIC method takes less clock frequency with high delay. To overcome this problem, a new version of updated parallel and pipelined architecture is designed without degrading the performance. It provides highest maximum frequency with less delay by splitting the critical path into several smaller delay paths with enhanced circuit processing time. The designed architecture in this study can be used in navigation application. This method is implemented in the Xilinx ISE tool. |
| Author | V, Ellapan J, Sam Alaric |
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| Title | A PARALLEL AND PIPELINED ARCHITECTURE FOR CORDIC ALGORITHM |
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