Szolc, H., & Kryjak, T. (2022, July 25). Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA. arXiv.org. https://doi.org/10.48550/arxiv.2207.12198
Chicago Style (17th ed.) CitationSzolc, Hubert, and Tomasz Kryjak. "Hardware-in-the-loop Simulation of a UAV Autonomous Landing Algorithm Implemented in SoC FPGA." ArXiv.org 25 Jul. 2022. https://doi.org/10.48550/arxiv.2207.12198.
MLA (9th ed.) CitationSzolc, Hubert, and Tomasz Kryjak. "Hardware-in-the-loop Simulation of a UAV Autonomous Landing Algorithm Implemented in SoC FPGA." ArXiv.org, 25 Jul. 2022, https://doi.org/10.48550/arxiv.2207.12198.
Warning: These citations may not always be 100% accurate.