Automatic detection of recurring operation patterns
An important problem in the area of processor design for embedded systems is determining the proper instruction set architecture. Trade-offs have to be made between programmability and reusability of dedicated hardware for special functionality on the one hand, and a high performance dedicated instr...
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| Published in | Hardware/Software Codesign 1999: Proceedings of the IEEE 7th International Conference pp. 22 - 26 |
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| Main Authors | , |
| Format | Conference Proceeding |
| Language | English |
| Published |
New York, NY, USA
ACM
01.03.1999
IEEE |
| Series | ACM Conferences |
| Subjects | |
| Online Access | Get full text |
| ISBN | 9781581131321 1581131321 |
| ISSN | 1092-6100 |
| DOI | 10.1145/301177.301192 |
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| Summary: | An important problem in the area of processor design for embedded systems is determining the proper instruction set architecture. Trade-offs have to be made between programmability and reusability of dedicated hardware for special functionality on the one hand, and a high performance dedicated instruction set on the other hand. This paper addresses the question of how to find specialized ISA extensions for a set of applications. We describe the application of a new pattern matching technique to the problem of the identification of recurring patterns of operations. By implementing frequently occurring operation patterns in hardware, and using this hardware as special function units, a fine-grained hardware/software partitioning can be found. The fine granularity, and the fact that patterns are taken from a number of different target applications rather than a single one, increase the opportunities for reuse of the special-purpose hardware. We illustrate our technique with experiments on a number of benchmarks from the DSP domain. |
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| Bibliography: | SourceType-Conference Papers & Proceedings-1 ObjectType-Conference Paper-1 content type line 25 |
| ISBN: | 9781581131321 1581131321 |
| ISSN: | 1092-6100 |
| DOI: | 10.1145/301177.301192 |