Design perspectives on 22nm CMOS and beyond

This paper presents technology and economic challenges posed by 22nm CMOS and beyond, and how they can be addressed by advances in design technology, validation, and testing, to exploit the benefits of scaling we have enjoyed over the decades.

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Bibliographic Details
Published in2009 46th ACM/IEEE Design Automation Conference pp. 93 - 94
Main Author Borkar, Shekhar
Format Conference Proceeding
LanguageEnglish
Published New York, NY, USA ACM 26.07.2009
IEEE
SeriesACM Conferences
Subjects
CMOS
CMOS technology
Costs
Delay
Dynamic voltage scaling
Hardware > Emerging technologies
Hardware > Very large scale integration design
Lithography
Manufacturing
Nano
Power
Power generation economics
Power system reliability
Testing
Threshold voltage
Variability
CMOS
power
variability
nano
Online AccessGet full text
ISBN9781605584973
1605584975
ISSN0738-100X
DOI10.1145/1629911.1629940

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Summary:This paper presents technology and economic challenges posed by 22nm CMOS and beyond, and how they can be addressed by advances in design technology, validation, and testing, to exploit the benefits of scaling we have enjoyed over the decades.
ISBN:9781605584973
1605584975
ISSN:0738-100X
DOI:10.1145/1629911.1629940