Cache coherence using local knowledge

Typically, commercially available shared memory machines have addressed the cache coherence problem with hardware strategies based on global inter-cache communication. However, global communication limits scalability and efficiency. "Local knowledge" coherence strategies, which avoid globa...

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Published inProceedings of the 1993 ACM/IEEE conference on Supercomputing pp. 720 - 729
Main Authors Darnell, E., Kennedy, K.
Format Conference Proceeding
LanguageEnglish
Published New York, NY, USA ACM 01.12.1993
IEEE
SeriesACM Conferences
Subjects
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ISBN0818643404
9780818643408
ISSN1063-9535
DOI10.1145/169627.169821

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Abstract Typically, commercially available shared memory machines have addressed the cache coherence problem with hardware strategies based on global inter-cache communication. However, global communication limits scalability and efficiency. "Local knowledge" coherence strategies, which avoid global communication at run-time, offer better scalability, at the cost of some additional cache misses. The most effective local knowledge strategies described in the literature are those based on generation time-stamps (TS). The authors propose a new strategy, TS1, that requires less extra storage than TS, only one extra bit per cache line, and can produce more cache hits by exploiting sophisticated compiler analysis. TS1 handles common synchronization paradigms including DOALL, DOACROSS, and critical sections. Early results show TS1 is, worst case, slightly slower than TS. Best case, TS1's flexibility allows for significant improvements.
AbstractList Typically, commercially available shared memory machines have addressed the cache coherence problem with hardware strategies based on global inter-cache communication. However, global communication limits scalability and efficiency. "Local knowledge" coherence strategies, which avoid global communication at run-time, offer better scalability, at the cost of some additional cache misses. The most effective local knowledge strategies described in the literature are those based on generation time-stamps (TS). The authors propose a new strategy, TS1, that requires less extra storage than TS, only one extra bit per cache line, and can produce more cache hits by exploiting sophisticated compiler analysis. TS1 handles common synchronization paradigms including DOALL, DOACROSS, and critical sections. Early results show TS1 is, worst case, slightly slower than TS. Best case, TS1's flexibility allows for significant improvements.
Author Darnell, E.
Kennedy, K.
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SubjectTerms Cache storage
Computer science
Computer systems organization -- Architectures -- Parallel architectures
Condition monitoring
Contracts
Costs
Global communication
Hardware
Hardware -- Integrated circuits -- Semiconductor memory -- Dynamic memory
Large-scale systems
Runtime
Scalability
Software and its engineering -- Software notations and tools -- Compilers
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Title Cache coherence using local knowledge
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