Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling - Mukhopadhyay, Saibal; Raychowdhury, Arijit; Roy, Kaushik (2003 40th Annual Conference Design Automation, 2003)
Keywords: CMOS logic circuits; Doping profiles; Geometry; Hardware -- Hardware validation -- Functional verification -- Simulation and emulation; Leakage current; Logic circuits; Semiconductor device modeling; Semiconductor process modeling; Solid modeling; Temperature; Tunneling; tunneling; doping profiles; threshold voltage; leakage