Handbook of model checking
Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for...
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| Format | eBook Book |
| Language | English |
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Springer
2018
Springer International Publishing AG Springer International Publishing |
| Edition | 1 |
| Subjects | |
| Online Access | Get full text |
| ISBN | 9783319105741 3319105744 |
| DOI | 10.1007/978-3-319-10575-8 |
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| Abstract | Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for the verification of hardware and software in industry.The editors and authors of this handbook are among the world's leading researchers in this domain, and the 32 contributed chapters present a thorough view of the origin, theory, and application of model checking. In particular, the editors classify the advances in this domain and the chapters of the handbook in terms of two recurrent themes that have driven much of the research agenda: the algorithmic challenge, that is, designing model-checking algorithms that scale to real-life problems; and the modeling challenge, that is, extending the formalism beyond Kripke structures and temporal logic.The book will be valuable for researchers and graduate students engaged with the development of formal methods and verification tools. |
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| AbstractList | Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for the verification of hardware and software in industry.The editors and authors of this handbook are among the world's leading researchers in this domain, and the 32 contributed chapters present a thorough view of the origin, theory, and application of model checking. In particular, the editors classify the advances in this domain and the chapters of the handbook in terms of two recurrent themes that have driven much of the research agenda: the algorithmic challenge, that is, designing model-checking algorithms that scale to real-life problems; and the modeling challenge, that is, extending the formalism beyond Kripke structures and temporal logic.The book will be valuable for researchers and graduate students engaged with the development of formal methods and verification tools. |
| Author | Henzinger, Thomas A. Veith, Helmut Clarke, Edmund M. Bloem, Roderick |
| Author_xml | – sequence: 1 fullname: Clarke, Edmund M. – sequence: 2 fullname: Henzinger, Thomas A. – sequence: 3 fullname: Veith, Helmut – sequence: 4 fullname: Bloem, Roderick |
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| DOI | 10.1007/978-3-319-10575-8 |
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| Discipline | Computer Science |
| EISBN | 3319105752 9783319105758 |
| Edition | 1 1st ed. 2018. |
| Editor | Henzinger, Thomas A. Veith, Helmut Clarke, Edmund M. Bloem, Roderick |
| Editor_xml | – sequence: 1 givenname: Edmund M. surname: Clarke fullname: Clarke, Edmund M. organization: FORE Systems University Professor of Computer Science, Carnegie Mellon University, Pittsburgh, USA – sequence: 2 givenname: Thomas A. surname: Henzinger fullname: Henzinger, Thomas A. email: tah@ist.ac.at organization: Institute of Science and Technology Austria (IST), Klosterneuburg, Austria – sequence: 3 givenname: Helmut surname: Veith fullname: Veith, Helmut organization: Arbeitsbereich Formal Methods in Systems Engineering, Technische Universität Wien, Wien, Austria – sequence: 4 givenname: Roderick surname: Bloem fullname: Bloem, Roderick email: roderick.bloem@iaik.tugraz.at organization: Institut f. Angewandte Informationsverarbeitung und Kommunikationstechnologie (IAIK), Technische Universität Graz, Graz, Austria |
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| Notes | Other editors: Thomas A. Henzinger, Helmut Veith, Roderick Bloem Includes bibliographical references and index |
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| Snippet | Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research... |
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| SubjectTerms | Computer Science Computer systems-Handbooks, manuals, etc Mathematical Logic and Foundations Mathematics of Computing Performance and Reliability Quality Control, Reliability, Safety and Risk Software Engineering/Programming and Operating Systems Theory of Computation |
| TableOfContents | 12.3.1.4 Complementation Intro -- Handbook of Model Checking -- Foreword -- Preface -- Acknowledgements -- Contents -- Contributors -- Chapter 1: Introduction to Model Checking -- 1.1 The Case for Computer-Aided Veri cation -- 1.2 Temporal-Logic Model Checking in a Nutshell -- 1.2.1 Kripke Structures -- 1.2.2 The Temporal Logic CTL -- 1.2.3 The Temporal Logic CTL -- 1.2.4 The Temporal Logic LTL -- 1.3 A Very Brief Guide Through the Chapters of the Handbook -- 1.3.1 The Algorithmic Challenge -- 1.3.2 The Modeling Challenge -- 1.4 The Future of Model Checking -- References -- Chapter 2: Temporal Logic and Fair Discrete Systems -- 2.1 Introduction -- 2.2 Fair Discrete Systems -- 2.2.1 Kripke Structures -- 2.2.2 De nition of Fair Discrete System -- 2.2.3 Representing Programs -- 2.2.4 Algorithms -- 2.3 Linear Temporal Logic -- 2.3.1 De nition of Linear Temporal Logic -- 2.3.2 Safety Versus Liveness and the Temporal Hierarchy -- 2.3.3 Extensions of LTL -- 2.3.4 Temporal Testers, Satis ability, and Model Checking -- 2.4 Computation Tree Logic -- 2.4.1 De nition of Computation Tree Logic -- 2.4.2 Extensions -- 2.4.3 Model Checking and Satis ability -- 2.5 Examples for LTL and CTL -- 2.5.1 Invariance and Safety -- 2.5.2 Liveness -- 2.5.3 Additional Examples -- 2.6 CTL* -- 2.6.1 Branching vs. Linear Time -- 2.6.2 CTL* De nition -- 2.6.3 Examples of Usage of CTL* -- 2.6.4 Model Checking and Satis ability -- References -- Chapter 3: Modeling for Veri cation -- 3.1 Introduction -- 3.2 Major Considerations in System Modeling -- 3.2.1 Selecting a Modeling Formalism and Language -- 3.2.1.1 Type of System -- 3.2.1.2 Type of Property -- 3.2.1.3 Modeling the Environment -- 3.2.1.4 Level of Abstraction -- 3.2.1.5 Clarity and Modularity -- 3.2.1.6 Form of Composition -- 3.2.1.7 Computational Engines -- 3.2.1.8 Practical Ease of Modeling and Expressiveness -- 3.2.2 Modeling Languages 9.4.2 Unique Implication Points -- 9.4.3 Learned Clause Minimization -- 9.4.4 Lazy Data Structures -- 9.4.5 Search Restarts -- 9.4.6 Lightweight Branching Heuristics -- 9.4.7 Additional Techniques and Recent Trends -- 9.5 SAT-Based Problem Solving -- 9.5.1 Incremental SAT -- 9.5.2 Unsatis able Cores -- 9.5.3 CNF Encodings -- 9.5.4 Optimization -- 9.5.5 Model Enumeration -- 9.5.6 Minimal Sets -- 9.5.7 Quanti cation -- 9.6 Research Directions -- References -- Chapter 10: SAT-Based Model Checking -- 10.1 Introduction -- 10.2 Bounded Model Checking on Kripke Structures -- 10.2.1 Kripke Structures -- 10.2.2 Safety Properties -- 10.2.3 Liveness Properties -- 10.2.3.1 Liveness to Safety Translation -- 10.2.3.2 k-Liveness -- 10.3 Bounded Model Checking for Hardware Designs -- 10.3.1 Hardware Description Languages (HDLs) -- 10.3.2 BMC on Net-Lists -- 10.4 Bounded Model Checking for Software -- 10.4.1 Monolithic Encodings -- 10.4.2 Path-Based Encodings -- 10.4.3 Completeness for Bounded Programs -- 10.4.4 BMC for Multi-threaded Programs -- 10.4.5 Bounded Model Checking for HW/SW Co-veri cation -- 10.5 Encodings into Propositional SAT -- 10.5.1 Encoding Bit Vectors -- 10.5.2 Encoding Memory -- 10.5.3 Encodings with Under- and Over-approximation -- 10.6 Complete Model Checking with SAT -- 10.6.1 Completeness Thresholds -- 10.6.2 Image Computation with SAT -- 10.6.3 Basic Inductive Techniques -- 10.6.3.1 Strengthening the Inductive Argument -- 10.6.3.2 Equivalence Reasoning -- 10.6.3.3 Temporal Decomposition -- 10.6.3.4 k-Induction -- 10.6.4 Craig Interpolation -- 10.6.5 Iterative Inductive Strengthening -- 10.7 Abstraction Techniques Using SAT -- 10.7.1 Overview of Predicate Abstraction -- 10.7.2 Computing Abstractions with SAT -- 10.7.3 Simulation with SAT -- 10.7.4 Abstraction-Based Tools -- 10.8 Outlook and Conclusions -- References 5.8.1 Bitstate Hashing and Bloom Filters -- 5.9 Extensions -- 5.10 Synopsis -- References -- Chapter 6: Partial-Order Reduction -- 6.1 Introduction -- 6.2 Partial Order Reduction -- Reduction for LTL -- On-the-Fly Model Checking -- Reduction for CTL -- Reduction for Process Algebra -- Reducing Visibility -- 6.3 Reducing Edges While Preserving States -- Sleep Sets -- Trace Normal Form -- Edge Lean Algorithm -- 6.4 Conclusions -- References -- Chapter 7: Binary Decision Diagrams -- 7.1 Introduction -- 7.2 Terminology -- 7.3 A Boolean Function API -- 7.4 OBDD Representation -- 7.5 Implementing OBDD Operations -- 7.6 Implementation Techniques -- 7.7 Variable Ordering and Reordering -- 7.8 Variant Representations -- 7.9 Representing Non-Boolean Functions -- 7.10 Scaling OBDD Capacity -- Comparison to SAT Checking -- 7.11 Concluding Remarks -- References -- Chapter 8: BDD-Based Symbolic Model Checking -- 8.1 Introduction -- 8.2 Preliminaries -- 8.3 Binary Decision Diagrams: The Basics -- 8.3.1 Representing Sets and Relations -- 8.3.1.1 Characteristic Function -- 8.3.1.2 Representing Sets -- 8.3.1.3 Representing Relations -- 8.3.2 Image Computation -- 8.3.3 Partitioned Transition Relation -- 8.3.3.1 Disjunctive Decomposition -- 8.3.3.2 Conjunctive Decomposition -- 8.3.4 Historical Perspective -- 8.4 Model Checking Kripke Structures -- 8.4.1 Reachability/Invariant/AG -- 8.4.2 CTL Model Checking -- 8.4.3 Fair CTL Model Checking -- 8.4.3.1 Function egFairStates -- 8.4.3.2 Function ctlFairStates -- 8.4.4 LTL Model Checking -- 8.4.4.1 Restricted Path Formula -- 8.4.4.2 Algorithm ltlTableau -- 8.5 Push-Down Symbolic Model Checking -- 8.6 Conclusion -- References -- Chapter 9: Propositional SAT Solving -- 9.1 Introduction -- 9.2 Preliminaries -- 9.3 CDCL SAT Solvers: Organization -- 9.4 CDCL SAT Solvers -- 9.4.1 Clause Learning and Non-chronological Backtracking Chapter 11: Satis ability Modulo Theories -- 11.1 Introduction -- 11.1.1 Technical Preliminaries -- 11.2 SMT in Model Checking -- 11.3 The Lazy Approach to SMT -- 11.3.1 A Basic Lazy SMT Solver -- 11.3.2 SAT Engine and Theory Solver Features -- 11.3.3 A General Framework and Architecture -- 11.4 Theory Solvers for Speci c Theories -- 11.4.1 Uninterpreted Function Symbols -- 11.4.2 Real Arithmetic -- 11.4.3 Integer Arithmetic -- 11.4.4 Mixed Integer and Real Arithmetic -- 11.4.5 Difference Logic -- 11.4.6 Bit Vectors -- 11.4.7 Arrays -- 11.4.8 Other Theories -- 11.5 Combining Theory Solvers -- 11.5.1 A Basic Combination Method -- 11.5.2 Combination Variants and Extensions -- 11.6 SMT Solving Extensions and Enhancements -- 11.7 Eager Encodings to SAT -- 11.8 Additional Functionalities of SMT Solvers -- References -- Chapter 12: Compositional Reasoning -- 12.1 Introduction -- 12.2 Reasoning with Assertions -- 12.2.1 The (Non-compositional) Owicki-Gries Method -- 12.2.2 The Assume-Guarantee View: Localized Inductive Invariants -- 12.2.2.1 The Shared-Variable Program Model -- A Note on Notation -- Invariant Assertions -- 12.2.2.2 Split Invariants -- 12.2.3 Computing the Strongest Split Invariant -- Split Invariance for N Processes -- 12.2.4 Relationship to Rely-Guarantee -- 12.2.5 Completeness Issues -- 12.2.6 Deadlock Detection with Local Invariants -- 12.2.7 Local Proofs for Termination, Temporal Properties, and Fairness -- 12.2.7.1 Background -- 12.2.7.2 Local Proof Rules for Liveness Properties -- 12.2.8 Algorithms for Local Analysis of Temporal Properties -- 12.2.9 Automating the Discovery of Auxiliary Variables -- 12.2.10 Local Symmetry -- 12.2.11 Further Reading -- 12.3 Automata-Based Assume-Guarantee Reasoning -- 12.3.1 Formalisms -- 12.3.1.1 Finite-State Machines -- 12.3.1.2 Parallel Composition of FSMs -- 12.3.1.3 Properties 3.2.3 Challenges in Modeling -- 3.2.4 Scope of This Chapter -- 3.3 Modeling Basics -- 3.3.1 Syntax -- 3.3.2 Dynamics -- 3.3.3 Modeling Concepts -- 3.4 Examples -- 3.4.1 Synchronous Circuits -- 3.4.1.1 Router Design -- 3.4.1.2 Simpli cations and sml Model -- 3.4.1.3 Veri cation Task: Progress Through the Router -- 3.4.1.4 Data Type Abstraction -- 3.4.1.5 Environment Modeling -- 3.4.1.6 Summary -- 3.4.2 Synchronous Control Systems -- 3.4.3 Concurrent Software -- 3.5 Kripke Structures -- 3.5.1 Transition Systems -- 3.5.2 From sml Programs to Kripke Structures -- 3.6 Summary -- References -- Chapter 4: Automata Theory and Model Checking -- 4.1 Introduction -- 4.2 Nondeterministic Büchi Automata on In nite Words -- 4.2.1 De nitions -- 4.2.2 Closure Properties -- 4.2.2.1 Closure Under Union and Intersection -- 4.2.2.2 Closure Under Complementation -- 4.2.3 Determinization -- 4.3 Additional Acceptance Conditions -- 4.3.1 Translations Among the Different Classes -- 4.3.1.1 Translations Among the Different Conditions -- 4.3.1.2 Typeness -- 4.3.1.3 Translations That Require a New State Space -- 4.3.2 Determinization of NBWs -- 4.4 Decision Procedures -- 4.5 Alternating Automata on In nite Words -- 4.5.1 De nition -- 4.5.2 Closure Properties -- 4.5.3 Decision Procedures -- 4.6 Automata-Based Algorithms -- 4.6.1 Translating LTL to Büchi Automata -- 4.6.1.1 A Translation via ABWs -- 4.6.1.2 A Direct Translation to NBWs -- 4.6.1.3 The Blow-up in the LTL to NBW Translation -- 4.6.2 Model Checking and Satis ability -- References -- Chapter 5: Explicit-State Model Checking -- 5.1 Introduction -- 5.1.1 The Importance of Abstraction -- 5.2 Basic Search Algorithms -- 5.3 Linear Temporal Logic -- 5.4 Omega Automata -- 5.5 Nested Depth-First Search -- 5.6 Abstraction -- 5.6.1 Tic-Tac-Toe -- 5.7 Model-Driven Veri cation -- 5.8 Incomplete Storage |
| Title | Handbook of model checking |
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