Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration - Tiwary, Saurabh K.; Tiwary, Pragati K.; Rutenbar, Rob A. (2006 43rd ACM/IEEE Design Automation Conference, 2006)
Keywords: Algorithms Design; Circuit simulation; Circuit synthesis; Circuit topology; Computational modeling; Hardware -- Electronic design automation -- Physical design (EDA); Monte Carlo methods; optimization; Pareto optimization; pareto surfaces; performance space; Sorting; Space exploration; Space technology; Voltage-controlled oscillators; Yield; performance space; optimization; pareto surfaces; yield