Memristor-based approximated computation

• Published in: Proceedings of the 2013 International Symposium on Low Power Electronics and Design pp. 242 - 247
• Main Authors: Li, Boxun, Shan, Yi, Hu, Miao, Wang, Yu, Chen, Yiran, Yang, Huazhong
• Format: Conference Proceeding
• Language: English
• Published: Piscataway, NJ, USA IEEE Press 04.09.2013
• Series: ACM Conferences
• Subjects: Applied computing > Physical sciences and engineering > Electronics; Hardware > Hardware validation; Hardware > Integrated circuits > Logic circuits; Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits; approximated computation; memristor; neuromorphic; power efficiency
• ISBN: 1479912352; 9781479912353
• DOI: 10.5555/2648668.2648729

The cessation of Moore's Law has limited further improvements in power efficiency. In recent years, the physical realization of the memristor has demonstrated a promising solution to ultra-integrated hardware realization of neural networks, which can be leveraged for better performance and power efficiency gains. In this work, we introduce a power efficient framework for approximated computations by taking advantage of the memristor-based multilayer neural networks. A programmable memristor approximated computation unit (Memristor ACU) is introduced first to accelerate approximated computation and a memristor-based approximated computation framework with scalability is proposed on top of the Memristor ACU. We also introduce a parameter configuration algorithm of the Memristor ACU and a feedback state tuning circuit to program the Memristor ACU effectively. Our simulation results show that the maximum error of the Memristor ACU for 6 common complex functions is only 1.87% while the state tuning circuit can achieve 12-bit precision. The implementation of HMAX model atop our proposed memristor-based approximated computation framework demonstrates 22X power efficiency improvements than its pure digital implementation counterpart.