Towards energy-efficient high-throughput photonic NoCs for 2.5D integrated systems a case for AWGRs

• Published in: Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip pp. 1 - 8
• Main Authors: Werner, Sebastian, Fotouhi, Pouya, Proietti, Roberto, Xiao, Xian, Yoo, S. J. Ben
• Format: Conference Proceeding
• Language: English
• Published: Piscataway, NJ, USA IEEE Press 04.10.2018
• Series: ACM Conferences
• ISBN: 1538648938; 9781538648933
• DOI: 10.5555/3306619.3306624

Silicon Photonics (SiPs) can overcome the energy and bandwidth limitations of electrical interconnects in networks-on-chip (NoCs) and enable efficient global all-to-all connectivity-the ideal from a performance perspective. Unfortunately, state-of-the-art SiP switching fabrics impose power overheads for thermo-optical control of microring resonators (MRs), excessive crosstalk, or challenging physical layout. The Arrayed Waveguide Grating Router (AWGR) is a SiP device that provides layout-efficient and scalable all-to-all connectivity through wavelength-routing on a passive and compact platform. Recent technological advances now enable AWGR integration with significantly reduced footprint (<1mm2), crosstalk (<-38dB), and loss (<2dB), making AWGRs emerge as a major enabler for energy-efficient all-to-all connectivity in NoCs. This paper, for the first time, populates the design space of AWGR-based NoC topologies and compares AWGRs to state-of-the-art SiP fabrics and aggressive electrical baselines. Our results make a compelling case for AWGRs in interposer-based systems with processor disintegration, which have high bandwidth demands, large on-chip distances, and less stringent area constraints. AWGR-based NoCs can offer an average of 1.67x power savings, 1.23x speed-up, and 1.5x lower energy-delay-product (EDP) on PARSEC3.0/SPLASH-2x workloads compared to electrical baselines, and fewer waveguides, wavelengths, or MRs than alternative SiP crossbar fabrics.