APA (7th ed.) Citation

de Streel, G., & Bol, D. (2013, September 4). Impact of back gate biasing schemes on energy and robustness of ULV logic in 28nm UTBB FDSOI technology. Proceedings of the 2013 International Symposium on Low Power Electronics and Design, 255-260. https://doi.org/10.5555/2648668.2648733

Chicago Style (17th ed.) Citation

de Streel, Guerric, and David Bol. "Impact of Back Gate Biasing Schemes on Energy and Robustness of ULV Logic in 28nm UTBB FDSOI Technology." Proceedings of the 2013 International Symposium on Low Power Electronics and Design 4 Sep. 2013: 255-260. https://doi.org/10.5555/2648668.2648733.

MLA (9th ed.) Citation

de Streel, Guerric, and David Bol. "Impact of Back Gate Biasing Schemes on Energy and Robustness of ULV Logic in 28nm UTBB FDSOI Technology." Proceedings of the 2013 International Symposium on Low Power Electronics and Design, 4 Sep. 2013, pp. 255-260, https://doi.org/10.5555/2648668.2648733.