Rectangle-packing-based module placement

• Published in: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design pp. 472 - 479
• Main Authors: Murata, Hiroshi, Fujiyoshi, Kunihiro, Nakatake, Shigetoshi, Kajitani, Yoji
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 01.12.1995
• Series: ACM Conferences
• Subjects: Hardware > Electronic design automation > Physical design (EDA) > Placement; Hardware > Electronic design automation > Physical design (EDA) > Wire routing
• ISBN: 9780818672132; 0818672137
• DOI: 10.5555/224841.225094

The first and the most critical stage in VLSI layout design is the placement, the background of which is the rectangle packing problem: Given many rectangular modules of arbitrary size, place them without overlapping on a layer in the smallest bounding rectangle. Since the variety of the packing is infinite (two- dimensionally continuous) many, the key issue for successful optimization is in the introduction of a P-admissible solution space, which is a finite set of solutions at least one of which is optimal. This paper proposes such a solution space where each packing is represented by a pair of module name sequences. Searching this space by simulated annealing, hundreds of modules could be successfully packed as demonstrated. Combining a conventional wiring method, the biggest MCNC benchmark ami49 is challenged.