http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
RF design with practical applications using Pathwave/ADS software
This text/reference develops practical intuition into the art of RF circuit design and introduces users to the widely used simulation tool, Pathwave ADS, from Keysight Technologies. By using project-oriented assignments, it builds a strong foundation and focuses on practical applications illustrated by examples, simulation tutorials, and homework problems. Learning through doing has proven to be an effective preparatory tool for more advanced and complex applications, and this book is developed from the author⁰́₉s lecture notes for a senior/graduate class at University of California Santa Barbara. The class had a significant lab component employing measurement techniques, board-level prototyping, and RFIC design. Falling somewhere between a traditional textbook and a practical handbook, it focuses mainly on analog RF analysis and design and circuit simulation techniques.
Preface xv List of Figures xvii List of Tables xli List of Abbreviations xliii 1 Nonideal Components 1 1.1 Lumped Element Components 1 1.2 Component Equivalent Networks 3 1.2.1 Wire 3 1.2.2 Resistance 3 1.2.3 Inductance of a wire 4 1.2.4 Resistors 5 1.2.5 Capacitors 7 1.2.6 Bypass capacitor example 8 1.2.7 Inductor 9 1.2.8 Quality factor, Q 11 1.2.9 Loaded Q 12 1.3 Summary 16 1.3.1 Nonideal components 16 1.3.2 Quality factor (Q) of components and resonant circuits 16 Appendix 1.1. A short tutorial on using Pathwave ADS 20 Appendix 1.2. Measurement of Nonideal components 30 2 Transmission Lines ⁰́₃ A Review and Explanation 33 2.1 What is a Transmission Line? 33 2.1.1 Common features 33 2.2 Compare Microstrip to Stripline 35 2.3 Some Typical Material Parameters 36 2.4 Voltage and Current on Transmission Lines 37 2.5 Reflection Parameters 38 2.6 Examples 39 2.7 Return Loss 40 2.8 What About the Source End? 40 2.9 Transmission Parameters 41 2.10 Transmission Line Junction 42 2.11 Transmission line laws 43 2.12 Lumped-element Equivalent Circuit 44 2.13 Summary 46 Appendix 2.1. Linecalc Transmission Line Analysis Tool 48 Appendix 2.2. Transient Analysis in ADS 50 3 Transmission Line Analysis in the Frequency Domain 53 3.1 Last Chapter: A Quick Review 53 3.2 Transmission Lines in the Frequency Domain and the Smith Chart 54 3.3 Voltage and Current on Transmission Lines 57 3.4 Reflections in the Frequency Domain 57 3.5 Movement of Reference Plane 58 3.6 Voltage Standing Wave Ratio (VSWR) 59 3.7 Impedance vs. Position 59 3.8 Introduction to the Smith Chart 60 3.9 Let⁰́₉s Look at Some Interesting Examples 64 3.9.1 Quarter wavelength transmission line 64 3.10 Admittance Chart 67 3.11 Examples 68 3.12 An Important Observation 69 3.13 Measurement Exercises 71 3.13.1 Lab exercise 71 3.13.2 Quarter wave impedance transformer 73 3.13.3 Two techniques for measuring Z0 and vp of a transmission line 73 3.14 Summary 74 4 S-parameters 79 4.1 Two-port descriptions 79 4.1.1 Admittance parameters 80 4.1.2 Impedance parameters 81 4.2 S-parameters 82 4.2.1 Reflection coefficient 83 4.2.2 Transmission coefficient 84 4.3 Some Comments on Power Measurement 84 4.4 Define Available Power and Actual Load Power 85 4.4.1 Actual load power 87 4.4.2 Reflected power 87 4.4.3 Transducer gain 88 4.5 Reference Planes 89 4.5.1 Electrical length 90 4.5.2 Converting from electrical length to physical length 91 4.5.3 How to calculate S-parameters quickly 91 4.5.4 What happens when there is a reference plane extension? 95 4.6 Summary 96 5 Matching Network Design 101 5.1 Impedance Matching 101 5.2 Lumped element ⁰́₋L⁰́₊ Matching Networks 102 5.2.1 How to proceed 103 5.2.2 Design a matching network 104 5.2.3 Why choose one form (high pass vs. low pass) over the other? 108 5.3 Matching with Distributed Elements 109 5.3.1 Shunt inductor 111 5.3.2 Series inductor 111 5.3.3 Shunt capacitor 111 5.4 Design of Transmission Line Matching Networks 112 5.4.1 Series transmission lines 115 5.5 Transmission Line L Network Design Examples 116 5.6 Summary 119 Appendix 5.1. Discrete Distributed Matching Network 121 Appendix 5.2. Three Element Matching Networks 124 6 Small Signal Amplifier Design 129 6.1 Transducer Power Gain 129 6.2 Stability of Amplifiers 132 6.2.1 Basis for stability of amplifiers 133 6.2.2 Stability 134 6.2.3 More gain definitions 137 6.2.4 Stability circles 140 6.3 Gain Circles 146 6.3.1 Bilateral case 147 6.3.2 Limitations of Rollett⁰́₉s stability factor 156 6.4 Summary of Amplifier Design Methodology 157 6.4.1 Bilateral case S12 > 0 (potentially unstable) 157 6.4.2 Bilateral case for k > 1 (conditionally stable) 157 6.4.3 WS Probe 157 7 Bias Circuit Design andWideband Microwave Amplifiers 163 7.1 Biasing 164 7.1.1 Active bias circuit 167 7.2 Wideband Shunt-series Feedback Amplifier 168 7.2.1 DC biasing with shunt-series feedback 170 7.3 DC Simulation with ADS 171 7.4 Implementation: Microstrip Line Modeling in ADS 171 8 Performance Limitations of Amplifiers ⁰́₃ Distortion and Noise 175 8.1 Distortion in Nonlinear Systems 175 8.1.1 Gain compression 176 8.1.2 Harmonic distortion 177 8.1.3 Intermodulation distortion 178 8.1.4 Cross modulation 178 8.1.5 Intermodulation distortion 178 8.1.6 Second order nonlinearity 180 8.1.7 Measuring IMD performance 183 8.2 Next Topic: Noise 185 8.2.1 Noise basics: sources of noise 186 8.2.2 Noise equivalent bandwidth 191 8.2.3 Signal-to-noise ratio 192 8.2.4 Noise factor, F 192 8.2.5 Noise temperature 195 8.2.6 Noise figure of cascaded stage 196 8.2.6.1 Second stage noise contribution 196 8.2.7 Minimum detectable signal 198 8.2.8 Noise figure of passive networks 199 8.2.9 How to measure the noise figure of an amplifier 200 8.2.10 Spurious free dynamic range 204 8.2.11 Noise and distortion example 205 8.3 Summary 206 Appendix 8.1. Harmonic Balance Simulation on ADS 210 9 Design of Low Noise Amplifiers 227 9.1 Device Noise Models 228 9.1.1 Input-referred noise voltage and currents 228 9.1.2 Two-port noise parameter representation 228 9.1.3 Measuring the two port noise parameters 230 9.2 Noise Figure Circles 231 9.3 Available Gain Circles 232 9.4 Using ADS to Simulate the Noise Figure 233 9.4.1 Using ADS large signal model library 234 9.5 Summary 242 Appendix 9.1 Representing Devices as an S2P File 246 Appendix 9.2. Free Space Propagation Model 247 A9.2.1 Antenna noise model 249 A9.2.2 Earth satellite receiver 251 10 Introduction to Receivers 255 10.1 Receiver Architectural Concepts 255 10.2 Image Rejection 258 10.2.1 What is the source of the image signal? 258 10.2.2 Channel selection 261 10.2.3 Example. FM broadcast receiver 262 10.2.4 Example: AM broadcast band 263 10.2.5 Calculate image rejection 264 10.3 Dual Conversion Architecture 265 10.4 Automatic Gain Control (AGC) 267 10.5 Compare Superheterodyne and Direct Conversion 267 10.6 Summary 268 11 Mixers 273 11.1 Types of Mixer 273 11.1.1 Non-linear mixer 274 11.1.2 Switching mixer 277 11.1.3 Single-balanced mixer 278 11.1.4 Double-balanced mixer 282 11.2 Mixer Performance: Conversion Gain. 284 11.3 Gain compression 285 11.4 Mixer Performance: Intermodulation Distortion 288 11.5 Mixer Performance: Isolation 289 11.6 Harmonic Balance Simulation for Mixer Intermodulation 290 11.7 Mixer Performance: Noise Figure 293 11.8 Lab Exercise. Mixer Characterization 295 11.9 Simulation of Mixer Noise Figure 296 11.10 Mixer Circuit Examples 298 11.10.1 Diode DB quad 298 11.10.2 Mixer Circuit Examples: Double-balanced Switching FETMixer 302 11.11 Passive vs. Active Mixers? 304 11.11.1 Mixer examples: differential pair is the basis for an active mixer 305 11.11.2 Noise analysis of the differential active mixer 310 11.12 Summary 314 11.13 Homework 315 Appendix 11.1.
Defining a subnetwork in ADS 320 12 Quadrature Signals and Image Reject Mixers 323 12.1 Quadrature Signals 323 12.2 Image Reject Mixers using I and Q signals 328 12.3 Transmit Upconverting Image Reject Mixers 330 12.4 Phase and Amplitude Requirements 331 12.5 Phase Shift Networks 331 12.5.1 Digital phase generation 334 12.5.2 Phase-locked loop 335 12.6 Summary 335 12.7 Homework 336 13 Resonators 339 13.1 Quality Factor, Q 339 13.2 Insertion Loss and Bandwidth 342 13.2.1 A useful series-parallel transformation 344 13.2.2 Tapped Capacitor Network 345 13.3 Tapped Capacitor Resonator 351 13.4 Coupled Resonator 352 13.5 Temperature Compensation of Resonant Circuits 353 13.5.1 Capacitors 353 13.5.2 Inductors 354 14 Oscillators 357 14.1 Introduction: Oscillator Basics 357 14.2 LC Resonator-based Oscillators 359 14.2.1 Circuit #1 360 14.2.2 Circuit #2 362 14.2.3 Circuit #3 364 14.2.4 Circuit #4 365 14.3 Biasing and Bypassing 368 14.4 Simulation Methods 369 14.4.1 AC simulation of open loop 369 14.4.2 Transient analysis of oscillator 370 14.4.3 Harmonic balance (HB) simulation 372 14.5 Amplitude Prediction 375 14.6 Buffer Amplifier Considerations 376 14.6.1 Bandwidth 377 14.6.2 Options 377 14.6.3 Common emitter buffer amplifier 377 14.7 Voltage Controlled Oscillator (VCO) 382 14.8 Biasing the Varactor Diodes 383 14.8.1 Tuning range of oscillator 385 14.8.2 Common drain Colpitts 385 14.9 Crystal Oscillator 386 14.10 Ring Oscillators 388 14.10.1 Implementation of ring oscillators 389 15 Low Phase Noise Oscillators 399 15.1 Sources of Noise 400 15.2 Phase Noise Spectrum 401 15.3 Oscillator Figure of Merit 403 15.4 Leeson⁰́₉s Equation 404 15.5 Oscillator Designs that Reduce Phase Noise 405 15.5.1 How can we improve Psig? 406 15.5.2 A baseline: LC differential CMOS oscillator 407 15.5.3 Tapped inductor oscillator 407 15.5.4 Transformer power combining oscillator 409 15.5.5 Clapp oscillator 409 15.6 Phase Noise Simulation with ADS 412 16 Power Amplifiers 417 16.1 Device Limitations 417 16.1.1 Breakdown 418 16.1.2 Maximum current 419 16.2 Conjugate Match Revisited 420 16.2.1 Large-signal load line 421 16.3 Efficiency 422 16.3.1 Power-added efficiency (PAE) 423 16.4 Thermal Resistance and Temperature Limitations 423 16.4.1 Reliability 423 16.4.2 Thermal resistance model 424 16.5 First PA: Class A 425 16.5.1 Class A power amplifier summary 430 16.6 Higher Efficiency Power Amplifiers: Reduced Conduction Angle 431 16.6.1 Class B 432 16.6.2 Harmonic termination 436 16.6.3 Input drive 438 16.6.4 Nonlinear gate capacitance 439 16.7 Power Output Capability 439 16.8 Class F 441 16.8.1 Class F circuits 443 16.8.2 Inverse F circuit 445 16.8.3 Class E PAs 446 16.8.3.1 Design equations 446 16.9 Summary 447 17 Power Amplifiers: Part 2 449 17.1 Power Amplifier Large-signal Impedance Matching 449 17.1.1 Package parasitics 453 17.1.2 Input matching 454 17.2 Simulation Methods for Power Amps 455 17.2.1 Simulation approach 455 17.2.2 Source pull 458 17.3 Power Amp Bias Circuits 459 17.3.1 Potential problems 461 17.3.2 Experimental measurement for stability 462 17.4 Summary 464 Index 473 About the Author 477.
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