MOS devices for low-voltage and low-energy applications

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Bibliographic Details
Main Authors: Omura, Y. (Author), Mallik, Abhijit, (Author), Matsuo, N. (Author)
Format: eBook
Language: English
Published: Singapore ; Hoboken, NJ : John Wiley & Sons, 2017.
Subjects:
Metal oxide semiconductors.
elektronické knihy
electronic books
ISBN: 9781119107361
1119107369
9781119107378
1119107377
9781523115273
1523115270
9781119107385
1119107385
9781119107354
1119107350
Physical Description: 1 online resource (xvii, 465 pages)

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Table of contents

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100 1 |a Omura, Y.  |q (Yasuhisa),  |e author.  |1 https://id.oclc.org/worldcat/entity/E39PCjBqb6jKyphttFJKJJFTxP 
245 1 0 |a MOS devices for low-voltage and low-energy applications /  |c Yasuhisa Omura, Abhijit Mallik, and Naoto Matsuo. 
246 1 |i Available from some providers with title:  |a Promising MOS Devices for Low-Voltage and Low-Energy Applications 
264 1 |a Singapore ;  |a Hoboken, NJ :  |b John Wiley & Sons,  |c 2017. 
264 4 |c ©2017 
300 |a 1 online resource (xvii, 465 pages) 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
505 0 |6 880-01  |a INTRODUCTION TO LOW-VOLTAGE AND LOW-ENERGY DEVICES. Why Are Low-Voltage and Low-Energy Devices Desired? -- History of Low-Voltage and Low-Power Devices -- Performance Prospects of Subthreshold Logic Circuits -- SUMMARY OF PHYSICS OF MODERN SEMICONDUCTOR DEVICES. Overview -- Bulk MOSFET -- SOI MOSFET -- Tunnel Field-Effect Transistors (TFETs) -- POTENTIAL OF CONVENTIONAL BULK MOSFETs. Performance Evaluation of Analog Circuits with Deep Submicrometer MOSFETs in the Subthreshold Regime of Operation -- Impact of Halo Doping on the Subthreshold Performance of Deep-Submicrometer CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications -- Study of the Subthreshold Performance and the Effect of Channel Engineering on Deep Submicron Single-Stage CMOS Amplifiers -- Subthreshold Performance of Dual-Material Gate CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications -- Performance Prospect of Low-Power Bulk MOSFETs -- POTENTIAL OF FULLY-DEPLETED SOI MOSFETs. Demand for High-Performance SOI Devices -- Demonstration of 100 nm Gate SOI CMOS with a Thin Buried Oxide Layer and its Impact on Device Technology -- Discussion on Design Feasibility and Prospect of High-Performance Sub-50 nm Channel Single-Gate SOI MOSFET Based on the ITRS Roadmap -- Performance Prospects of Fully Depleted SOI MOSFET-Based Diodes Applied to Schenkel Circuits for RF-ID Chips -- The Potential and the Drawbacks of Underlap Single-Gate Ultrathin SOI MOSFET -- Practical Source/Drain Diffusion and Body Doping Layouts for High-Performance and Low-Energy Triple-Gate SOI MOSFETs -- Gate Field Engineering and Source/Drain Diffusion Engineering for High-Performance Si Wire Gate-All-Around MOSFET and Low-Power Strategy in a Sub-30 nm-Channel Regime -- Impact of Local High-k Insulator on Drivability and Standby Power of Gate-All-Around SOI MOSFET -- POTENTIAL OF PARTIALLY DEPLETED SOI MOSFETs. Proposal for Cross-Current Tetrode (XCT) SOI MOSFETs -- Device Model of the XCT-SOI MOSFET and Scaling Scheme -- Low-Power Multivoltage Reference Circuit Using XCT-SOI MOSFET -- Low-Energy Operation Mechanisms for XCT-SOI CMOS Devices -- QUANTUM EFFECTS AND APPLICATIONS--1. Overview -- Si Resonant Tunneling MOS Transistor -- Tunneling Dielectric Thin-Film Transistor -- Proposal for a Tunnel-Barrier Junction (TBJ) MOSFET -- Performance Prediction of SOI Tunneling-Barrier-Junction MOSFET -- Physics-Based Model for TBJ-MOSFETs and High-Frequency Performance Prospects -- Low-Power High-Temperature-Operation-Tolerant (HTOT) SOI MOSFET -- QUANTUM EFFECTS AND APPLICATIONS--2. Overview of Tunnel Field-Effect Transistor -- Impact of a Spacer Dielectric and a Gate Overlap/Underlap on the Device Performance of a Tunnel Field-Effect Transistor -- The Impact of a Fringing Field on the Device Performance of a P-Channel Tunnel Field-Effect Transistor with a High-k Gate Dielectric -- Impact of a Spacer-Drain Overlap on the Characteristics of a Silicon Tunnel Field-Effect Transistor Based on Vertical Tunneling -- Gate-on-Germanium Source Tunnel Field-Effect Transistor Enabling Sub-0.5-V Operation -- PROSPECTS OF LOW-ENERGY DEVICE TECHNOLOLGY AND APPLICATIONS. Performance Comparison of Modern Devices -- Emerging Device Technology and the Future of MOSFET -- How Devices Are and Should Be Applied to Circuits -- Prospects for Low-Energy Device Technology and Applications. 
504 |a Includes bibliographical references and index. 
506 |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty 
590 |a Knovel  |b Knovel (All titles) 
650 0 |a Metal oxide semiconductors. 
655 7 |a elektronické knihy  |7 fd186907  |2 czenas 
655 9 |a electronic books  |2 eczenas 
700 1 |a Mallik, Abhijit,  |e author. 
700 1 |a Matsuo, N.  |q (Naoto),  |e author.  |1 https://id.oclc.org/worldcat/entity/E39PCjD7y77QkT6gMy4RWRKPQq 
776 0 8 |i Print version:  |a Omura, Y. (Yasuhisa).  |t MOS devices for low-voltage and low-energy applications.  |d Singapore : John Wiley & Sons Singapore Pte. Ltd., 2017  |z 9781119107354  |w (DLC) 2016026240  |w (OCoLC)951506454 
856 4 0 |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpMOSDLVL2/mos-devices-for?kpromoter=marc  |y Full text 

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