Nano-CMOS and post-CMOS electronics. Circuits and design /

Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels.

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Bibliographic Details
Other Authors: Mohanty, Saraju P., (Editor), Srivastava, Ashok (College teacher), (Editor)
Format: eBook
Language: English
Published: London, United Kingdom : The Institution of Engineering and Technology, [2016]
Series: Materials, circuits and devices series ; 30.
Subjects:
Metal oxide semiconductors, Complementary > Design and construction.
elektronické knihy
electronic books
ISBN: 9781785610004
1785610007
9781523103171
1523103175
9781849199995
184919999X
Physical Description: 1 online resource (xvi, 422 pages) : illustrations

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Table of contents

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040 |a N$T  |b eng  |e rda  |e pn  |c N$T  |d UIU  |d VLB  |d OCLCO  |d N$T  |d OCLCO  |d OCLCF  |d OCLCO  |d EBLCP  |d IDEBK  |d KNOVL  |d STF  |d IDB  |d OCLCQ  |d WAU  |d ESU  |d COO  |d VT2  |d OCLCQ  |d MERUC  |d OCLCQ  |d SNK  |d DKU  |d IGB  |d D6H  |d VTS  |d RRP  |d INT  |d OCLCQ  |d G3B  |d LVT  |d S8J  |d S9I  |d UKAHL  |d OCLCQ  |d OCLCO  |d OCLCQ  |d OCLCO  |d OCLCL  |d OCLCQ  |d SXB 
020 |a 9781785610004  |q (pdf) 
020 |a 1785610007  |q (pdf) 
020 |a 9781523103171  |q (electronic book) 
020 |a 1523103175  |q (electronic book) 
020 |z 9781849199995  |q (hardback) 
020 |z 184919999X  |q (hardback) 
035 |a (OCoLC)952336770 
245 0 0 |a Nano-CMOS and post-CMOS electronics.  |p Circuits and design /  |c edited by Saraju P. Mohanty and Ashok Srivastava. 
246 3 |a Nano-CMOS and post-CMOS.  |n Volume 2,  |p Circuits and design 
246 3 0 |a Circuits and design 
264 1 |a London, United Kingdom :  |b The Institution of Engineering and Technology,  |c [2016] 
264 4 |c ©2016 
300 |a 1 online resource (xvi, 422 pages) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Materials, circuits and devices series ;  |v 30 
504 |a Includes bibliographical references and index. 
505 0 |a 1. Self-healing analog/RF circuits -- 2. On-chip gate delay variability measurement in scaled technology node -- 3. Nanoscale FinFET devices for PVT-aware SRAM -- 4. Data stability and write ability enhancement techniques for FinFET SRAM circuits -- 5. Low-leakage techniques for nanoscale CMOS circuits -- 6. Thermal effects in carbon nanotube VLSI interconnects -- 7. Lumped electro-thermal modeling and analysis of carbon nanotube interconnects -- 8. High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era -- 9. SPICEless RTL design optimization of nanoelectronic digital integrated circuits -- 10. Green on-chip inductors for three-dimensional integrated circuits: concepts, algorithms and applications -- 11. 3D NoC: a promising alternative for tomorrow's nanosystem design -- 12. A new paradigm towards performance centric computation beyond CMOS: DNA computing. 
506 |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty 
520 |a Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels. 
520 |a "The demand for ever smaller and portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects, and is a limit on further miniaturization. To enable even smaller electronics, various nanodevices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors (collectively called post-CMOS devices) are emerging that could replace the traditional and ubiquitous silicon transistor. This book explores these nanoelectronics at the circuit and systems levels including modelling and design approaches and issues. Topics covered include self-healing analog and radio frequency circuits; on-chip gate delay variability measurement in scaled technology node; nanoscale finFET devices for PVT aware SRAM; data stability and write ability enhancement techniques for finFET SRAM circuits; low-leakage techniques for nanoscale CMOS circuits; thermal effects in carbon nanotube VLSI interconnects; lumped electro-thermal modeling and analysis of carbon nanotube interconnects; high-level synthesis of digital integrated circuits in the nanoscale mobile electronics era; SPICEless RTL design optimization of nanoelectronic digital integrated circuits; green on-chip inductors for three-dimensional integrated circuits; 3D network-on-chips; and DNA computing. This book is essential reading for researchers, research-focused industry designers/developers, and advanced students working on next-generation electronic devices and circuits."--Provided by publisher. 
590 |a Knovel  |b Knovel (All titles) 
650 0 |a Metal oxide semiconductors, Complementary  |x Design and construction. 
655 7 |a elektronické knihy  |7 fd186907  |2 czenas 
655 9 |a electronic books  |2 eczenas 
700 1 |a Mohanty, Saraju P.,  |e editor. 
700 1 |a Srivastava, Ashok  |c (College teacher),  |e editor.  |1 https://id.oclc.org/worldcat/entity/E39PCjMvhY8GDwK3wtyKPK33V3 
776 0 8 |i Print version:  |t Nano-CMOS and post-CMOS electronics. Circuits and design.  |d London, United Kingdom : The Institution of Engineering and Technology, [2016]  |z 9781849199995  |w (OCoLC)949869980 
830 0 |a Materials, circuits and devices series ;  |v 30. 
856 4 0 |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpNCMOSPCM/nano-cmos-and?kpromoter=marc  |y Full text 

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