Design and test technology for dependable systems-on-chip

• Other Authors: Ubar, Raimund, 1941-, Raik, Jaan, 1972-, Vierhaus, Heinrich Theodor, 1951-
• Format: Electronic eBook
• Language: English
• Published: Hershey, PA : Information Science Reference, ©2010.
• Subjects: Systems on a chip > Design and construction.; Networks on a chip > Design and construction.; Systems on a chip > Testing.; Networks on a chip > Testing.; elektronické knihy; electronic books
• ISBN: 9781609602123; 1609602129; 9781609602147; 1609602145; 9781621989547; 1621989542; 1283019736; 9781283019736; 9786613019738; 6613019739
• Physical Description: 1 online resource (xxvi, 550 pages) : illustrations

"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--

Table of Contents:

• Section 1. Design, modeling, and verification
• section 2. Faults, compensation and repair
• section 3. Fault simulation and fault injection
• section 4. Test technology for systems-on-chip
• section 5. Test planning, compression and compaction in SoC's.