Design and test technology for dependable systems-on-chip

"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--

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Bibliographic Details
Other Authors Ubar, Raimund, 1941-, Raik, Jaan, 1972-, Vierhaus, Heinrich Theodor, 1951-
Format Electronic eBook
LanguageEnglish
Published Hershey, PA : Information Science Reference, ©2010.
Subjects
Systems on a chip > Design and construction.
Networks on a chip > Design and construction.
Systems on a chip > Testing.
Networks on a chip > Testing.
elektronické knihy
electronic books
Online AccessFull text
ISBN9781609602123
1609602129
9781609602147
1609602145
9781621989547
1621989542
1283019736
9781283019736
9786613019738
6613019739
Physical Description1 online resource (xxvi, 550 pages) : illustrations

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More Information
Summary:"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--
Bibliography:Includes bibliographical references and index.
ISBN:9781609602123
1609602129
9781609602147
1609602145
9781621989547
1621989542
1283019736
9781283019736
9786613019738
6613019739
Access:Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty
Physical Description:1 online resource (xxvi, 550 pages) : illustrations

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