A designer's guide to asynchronous VLSI

"Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. The fundamentals of asynchronous design are covered, as is a large variety of design styles, while the emphasis throughout...

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Bibliographic Details
Main Author: Beerel, Peter A.
Other Authors: Ozdag, Recep O., Ferretti, Marcos.
Format: eBook
Language: English
Published: Cambridge ; New York : Cambridge University Press, 2010.
Subjects:
Integrated circuits > Very large scale integration > Computer-aided design.
Integrated circuits > Very large scale integration > Design and construction.
Asynchronous circuits.
elektronické knihy
electronic books
ISBN: 9780511675492
0511675496
9780511672248
0511672241
9780511670176
0511670176
9780521872447
0521872448 (hardback)
9780511674730
0511674732
Physical Description: 1 online resource (xii, 339 pages) : illustrations

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Table of contents

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007 cr cn|||||||||
008 100416s2010 enka ob 001 0 eng d
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020 |a 0511675496  |q (electronic bk.) 
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020 |a 0511672241  |q (ebook) 
020 |a 9780511670176  |q (electronic bk.) 
020 |a 0511670176  |q (electronic bk.) 
020 |z 9780521872447  |q (hardback) 
020 |z 0521872448 (hardback) 
020 |a 9780511674730  |q (ebook) 
020 |a 0511674732 
035 |a (OCoLC)607553606  |z (OCoLC)647879881  |z (OCoLC)667096160  |z (OCoLC)772462448  |z (OCoLC)994925316  |z (OCoLC)1065137852  |z (OCoLC)1086945321  |z (OCoLC)1167462471 
100 1 |a Beerel, Peter A. 
245 1 2 |a A designer's guide to asynchronous VLSI /  |c Peter A. Beerel, Recep O. Ozdag, Marcos Ferretti. 
260 |a Cambridge ;  |a New York :  |b Cambridge University Press,  |c 2010. 
300 |a 1 online resource (xii, 339 pages) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
506 |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty 
520 |a "Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. The fundamentals of asynchronous design are covered, as is a large variety of design styles, while the emphasis throughout is on practical techniques and real-world applications"--Provided by publisher. 
520 |a "This book provides an introduction to this diverse area of VLSI from a designer's point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future"--Provided by publisher. 
504 |a Includes bibliographical references and index. 
505 0 |a Introduction -- Channel-based asynchronous design -- Modeling channel-based designs -- Pipeline performance -- Performance analysis and optimization -- Deadlock -- A taxonomy of design styles -- Synthesis-based controller design -- Micropipeline design -- Syntax-directed translation -- Quasi-delay-intensitive pipeline templates -- Timed pipeline templates -- Single-track pipeline templates -- Asynchronous crossbar -- Design example : the Fano algorith. 
590 |a Knovel  |b Knovel (All titles) 
650 0 |a Integrated circuits  |x Very large scale integration  |x Computer-aided design. 
650 0 |a Integrated circuits  |x Very large scale integration  |x Design and construction. 
650 0 |a Asynchronous circuits. 
655 7 |a elektronické knihy  |7 fd186907  |2 czenas 
655 9 |a electronic books  |2 eczenas 
700 1 |a Ozdag, Recep O. 
700 1 |a Ferretti, Marcos. 
776 0 8 |i Print version:  |a Beerel, Peter A.  |t Designer's guide to asynchronous VLSI.  |d Cambridge ; New York : Cambridge University Press, 2010  |z 9780521872447  |w (DLC) 2009042290  |w (OCoLC)459209613 
856 4 0 |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpDGAVLSIA/designers-guide-to?kpromoter=marc  |y Full text 

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