Advanced model order reduction techniques in VLSI design
Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages.
Saved in:
| Main Author | |
|---|---|
| Other Authors | |
| Format | Electronic eBook |
| Language | English |
| Published |
Cambridge :
Cambridge University Press,
2007.
|
| Subjects | |
| Online Access | Full text |
| ISBN | 9781601197290 1601197292 9780521865814 0521865816 9780511290329 0511290322 051128909X 9780511289095 0511289723 9780511289729 9780511541117 0511541112 128091713X 9781280917134 1107178827 9781107178823 9786610917136 6610917132 0511322321 9780511322327 0511288417 9780511288418 9781107411548 1107411548 |
| Physical Description | 1 online resource (xviii, 240 pages) : illustrations |
Cover
| LEADER | 00000cam a2200000 a 4500 | ||
|---|---|---|---|
| 001 | kn-ocn320265935 | ||
| 003 | OCoLC | ||
| 005 | 20240717213016.0 | ||
| 006 | m o d | ||
| 007 | cr cn||||||||| | ||
| 008 | 090505s2007 enka ob 001 0 eng d | ||
| 040 | |a BUF |b eng |e pn |c BUF |d TEF |d IBI |d DEBSZ |d OCLCQ |d N$T |d YDXCP |d QE2 |d AU@ |d UV0 |d E7B |d IL4J6 |d NRU |d IDEBK |d B24X7 |d OCLCQ |d KNOVL |d ZCU |d KNOVL |d OCLCF |d KNOVL |d AUD |d OCLCQ |d EBLCP |d OCLCQ |d VT2 |d OCLCQ |d BUF |d REB |d UAB |d STF |d OCLCQ |d CEF |d RRP |d COO |d OCLCQ |d OL$ |d OCLCQ |d SFB |d WYU |d LUN |d OCLCQ |d OCLCO |d OCLCQ |d OCLCO |d OCLCL |d SXB | ||
| 020 | |a 9781601197290 |q (electronic bk.) | ||
| 020 | |a 1601197292 |q (electronic bk.) | ||
| 020 | |a 9780521865814 | ||
| 020 | |a 0521865816 | ||
| 020 | |a 9780511290329 |q (electronic bk.) | ||
| 020 | |a 0511290322 |q (electronic bk.) | ||
| 020 | |a 051128909X | ||
| 020 | |a 9780511289095 | ||
| 020 | |a 0511289723 |q (electronic bk.) | ||
| 020 | |a 9780511289729 |q (electronic bk.) | ||
| 020 | |a 9780511541117 |q (ebook) | ||
| 020 | |a 0511541112 |q (ebook) | ||
| 020 | |a 128091713X | ||
| 020 | |a 9781280917134 | ||
| 020 | |a 1107178827 | ||
| 020 | |a 9781107178823 | ||
| 020 | |a 9786610917136 | ||
| 020 | |a 6610917132 | ||
| 020 | |a 0511322321 | ||
| 020 | |a 9780511322327 | ||
| 020 | |a 0511288417 | ||
| 020 | |a 9780511288418 | ||
| 020 | |a 9781107411548 |q (paperback) | ||
| 020 | |a 1107411548 | ||
| 035 | |a (OCoLC)320265935 |z (OCoLC)173240494 |z (OCoLC)173812628 |z (OCoLC)271790396 |z (OCoLC)437447056 |z (OCoLC)648279183 |z (OCoLC)652466563 |z (OCoLC)776968644 |z (OCoLC)814500804 |z (OCoLC)819635480 |z (OCoLC)961884803 |z (OCoLC)988695923 |z (OCoLC)999520320 |z (OCoLC)1026453491 |z (OCoLC)1035675486 |z (OCoLC)1058037476 |z (OCoLC)1058042893 |z (OCoLC)1136473473 |z (OCoLC)1170270009 |z (OCoLC)1171528242 | ||
| 100 | 1 | |a Tan, Sheldon X. D. | |
| 245 | 1 | 0 | |a Advanced model order reduction techniques in VLSI design / |c Sheldon X.-D. Tan, Lei He. |
| 260 | |a Cambridge : |b Cambridge University Press, |c 2007. | ||
| 300 | |a 1 online resource (xviii, 240 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Cover; Half-title; Title; Copyright; Contents; Figures; Tables; Foreword; Acknowledgments; 1 Introduction; 2 Projection-based model order reduction algorithms; 3 Truncated balanced realization methods for MOR; 4 Passive balanced truncation of linear systems in descriptor form; 5 Passive hierarchical model order reduction; 6 Terminal reduction of linear dynamic circuits; 7 Vector-potential equivalent circuit for inductance modeling; 8 Structure-preserving model order reduction; 9 Block structure-preserving reduction for RLCK circuits; 10 Model optimization and passivity enforcement. | |
| 506 | |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty | ||
| 520 | |a Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages. | ||
| 590 | |a Knovel |b Knovel (All titles) | ||
| 650 | 0 | |a Integrated circuits |x Very large scale integration |x Design. | |
| 655 | 7 | |a elektronické knihy |7 fd186907 |2 czenas | |
| 655 | 9 | |a electronic books |2 eczenas | |
| 700 | 1 | |a He, Lei, |d 1968- |1 https://id.oclc.org/worldcat/entity/E39PCjHkrpvbJc9B6CTdg3hBvb | |
| 776 | 0 | 8 | |i Print version: |a Tan, Sheldon X.D. |t Advanced model order reduction techniques in VLSI design. |d Cambridge : Cambridge University Press, 2007 |z 9780521865814 |w (DLC) 2007298681 |w (OCoLC)78989087 |
| 856 | 4 | 0 | |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpAMORTVL1/advanced-model-order?kpromoter=marc |y Full text |